Re: [PATCH v4] io: add io_pgtable abstraction

[Boris Brezillon]

On Fri, 19 Dec 2025 14:38:51 +0000
Alice Ryhl <aliceryhl@xxxxxxxxxx> wrote:

> On Fri, Dec 19, 2025 at 10:05:57AM -0400, Jason Gunthorpe wrote:
> > On Fri, Dec 19, 2025 at 10:50:52AM +0000, Alice Ryhl wrote:  
> > > +// For now, we do not provide the ability to flush the TLB via the built-in callback mechanism.
> > > +// Instead, the `map_pages` function requires the caller to explicitly flush the TLB before the
> > > +// pgtable is used to access the newly created range.
> > > +//
> > > +// This is done because the initial user of this abstraction may perform many calls to `map_pages`
> > > +// in a single batched operation, and wishes to only flush the TLB once after performing the entire
> > > +// batch of mappings. These callbacks would flush too often for that use-case.
> > > +//
> > > +// Support for flushing the TLB in these callbacks may be added in the future.
> > > +static NOOP_FLUSH_OPS: bindings::iommu_flush_ops = bindings::iommu_flush_ops {
> > > +    tlb_flush_all: Some(rust_tlb_flush_all_noop),
> > > +    tlb_flush_walk: Some(rust_tlb_flush_walk_noop),
> > > +    tlb_add_page: None,
> > > +};  
> > 
> > This comment seems quite off..
> > 
> > Usually you don't flush on map, you flush on unmap. The TLB should be
> > empty upon mapping and not need flushing - except for the rarer
> > special cases of clearing the walk cache which cannot be detected any
> > other way than using these callbacks. Doing a big flush on map to deal
> > with the walk cache would be worse than implementing these callbacks.
> > 
> > The flush on unmap, at least for ARM style invalidations, needs these
> > callbacks because they provide required information. If the actual HW
> > does not use an ARM style invalidation system then this page table
> > code is not optimal for it.  
> 
> You should not assume that the way I worded something implies that the
> GPU hardware does something weird. It's more likely that I just got
> something wrong.
> 
> It looks like panthor / tyr flush the range that was modified after both
> map and unmap operations.

There's actually a confusion between TLB invalidation and L1/L2 cache
flush/invalidation. The things we can decide to flush/invalidate around
map/unmap ops are L1/L2 caches. The TLB invalidate, we don't have
direct control on: it happens as part of the LOCK+UNLOCK sequence, and
no matter what you execute (map or unmap), you have to surround it with
a LOCK/UNLOCK to provide support for atomic updates (GPU is blocked if
anything accesses the locked range while an update is on-going).

Robin, feel free to correct me if I'm wrong.