[PATCH 0/2] PCI/ASPM: Avoid L0s and L1 on Sophgo 2042/2044 PCIe Root Ports

[Inochi Amaoto]

Since commit f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and ASPM
states for devicetree platforms") force enable ASPM on all device tree
platform, the SG2042/SG2044 PCIe Root Ports breaks as it advertises L0s
and L1 capabilities without supporting it.

Override the L0s and L1 Support advertised in Link Capabilities by the
SG2042/SG2044 Root Ports so we don't try to enable those states.

Inochi Amaoto (2):
  PCI/ASPM: Avoid L0s and L1 on Sophgo 2042 PCIe [1f1c:2042] Root Ports
  PCI/ASPM: Avoid L0s and L1 on Sophgo 2044 PCIe [1f1c:2044] Root Ports

 drivers/pci/quirks.c    | 2 ++
 include/linux/pci_ids.h | 2 ++
 2 files changed, 4 insertions(+)

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2.52.0