RE: [PATCH v3 0/9] Add TSU support for RZ/T2H and RZ/N2H

[Cosmin-Gabriel Tanislav]

Could I have some feedback from the thermal maintainers regarding
this series? Is there anything I must change for it to be queued up?

> -----Original Message-----
> From: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@xxxxxxxxxxx>
> Sent: Wednesday, November 26, 2025 3:04 PM
> To: John Madieu <john.madieu.xa@xxxxxxxxxxxxxx>; Rafael J . Wysocki <rafael@xxxxxxxxxx>; Daniel
> Lezcano <daniel.lezcano@xxxxxxxxxx>; Zhang Rui <rui.zhang@xxxxxxxxx>; Lukasz Luba
> <lukasz.luba@xxxxxxx>; Rob Herring <robh@xxxxxxxxxx>; Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>; Conor
> Dooley <conor+dt@xxxxxxxxxx>; Geert Uytterhoeven <geert+renesas@xxxxxxxxx>; magnus.damm
> <magnus.damm@xxxxxxxxx>; Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
> Cc: linux-pm@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; linux-renesas-
> soc@xxxxxxxxxxxxxxx; Cosmin-Gabriel Tanislav <cosmin-gabriel.tanislav.xa@xxxxxxxxxxx>
> Subject: [PATCH v3 0/9] Add TSU support for RZ/T2H and RZ/N2H
>
> Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs expose the
> temperature calibration via SMC SIP and do not have a reset for the
> TSU peripheral, and use different minimum and maximum temperature values
> compared to RZ/G3E.
>
> Although the calibration data is stored in an OTP memory, the OTP itself
> is not memory-mapped, and instead, access to it is done through an OTP
> controller. The OTP controller is only accessible from the secure world,
> but the temperature calibration data stored in the OTP is exposed via
> SMC.
>
> V3:
>  * dt-bindings: rebase on top of [1]
>  * dt-bindings: conditionally add `resets: false` and
>    `renesas,tsu-trim: false` for renesas,r9a09g077-tsu compatibles
>
> V2:
>  * drop clk patch already present in linux-next
>  * dt-bindings: merge two items into a single enum
>
> [1]:
> https://patchwork.kernel.org/project/lin
> ux-pm%2Fcover%2F20251020143107.13974-1-ovidiu.panait.rb%40renesas.com%2F&data=05%7C02%7Ccosmin-
> gabriel.tanislav.xa%40renesas.com%7C7a5016e528af4bf804f108de2cec5e33%7C53d82571da1947e49cb4625a166a4a2
> a%7C0%7C0%7C638997590872132861%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlA
> iOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=osq3QQXwLGtLuHGkC05CppYS91YhGxwZN5kub
> hr8BZo%3D&reserved=0
>
> Cosmin Tanislav (9):
>   thermal: renesas: rzg3e: make reset optional
>   thermal: renesas: rzg3e: make min and max temperature per-chip
>   thermal: renesas: rzg3e: make calibration value retrieval per-chip
>   dt-bindings: thermal: r9a09g047-tsu: document RZ/T2H and RZ/N2H
>   thermal: renesas: rzg3e: add support for RZ/T2H and RZ/N2H
>   arm64: dts: renesas: r9a09g077: add OPP table
>   arm64: dts: renesas: r9a09g087: add OPP table
>   arm64: dts: renesas: r9a09g077: add TSU and thermal zones support
>   arm64: dts: renesas: r9a09g087: add TSU and thermal zones support
>
>  .../thermal/renesas,r9a09g047-tsu.yaml        |  30 ++++-
>  arch/arm64/boot/dts/renesas/r9a09g077.dtsi    |  65 +++++++++
>  arch/arm64/boot/dts/renesas/r9a09g087.dtsi    |  65 +++++++++
>  drivers/thermal/renesas/rzg3e_thermal.c       | 125 ++++++++++++------
>  4 files changed, 239 insertions(+), 46 deletions(-)
>
> --
> 2.52.0