Re: x86/apic: Drop useless row from the TSC deadline errata table

[Dave Hansen]

On 7/16/25 09:08, Andrew Cooper wrote:
> A microcode revision of 0 is guaranteed to exit
> apic_validate_deadline_timer() early, but a better way is with no
> row at all.
> 
> No functional change.

There's one bit of background that is missing which is that the
steppings are unaffected by the erratum. How about this for a changelog?

The later INTEL_SKYLAKE_X steppings (0x5=>0xf, aka. CXL/CPX) are
unaffected by the TSC deadline erratum. There is an entry in the
deadline_match[] table to reflect this. It puts puts a '0' in the table
to represent that all microcode versions >=0 are unaffected by the erratum.

That entry is unnecessary. The best way to indicate that a CPU is
unaffected is to simply omit it from the table.

Remove the stepping >=0x5 entry from the table.