Re: [PATCH v4 6/9] spi: dt-bindings: adi,axi-spi-engine: add multi-lane support

[Rob Herring (Arm)]

On Fri, 19 Dec 2025 15:32:14 -0600, David Lechner wrote:
> Extend the ADI AXI SPI engine binding for multiple data lanes. This SPI
> controller has a capability to read multiple data words at the same
> time (e.g. for use with simultaneous sampling ADCs). The current FPGA
> implementation can support up to 8 data lanes at a time (depending on a
> compile-time configuration option).
> 
> Signed-off-by: David Lechner <dlechner@xxxxxxxxxxxx>
> ---
> v4 changes:
> - Update to use spi-{tx,rx}-bus-width properties.
> ---
>  .../devicetree/bindings/spi/adi,axi-spi-engine.yaml       | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 

Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>