Re: [PATCH v7 0/4] Implement hardware automatic clock gating (HWACG) for gs101

From: Peter Griffin

Date: Tue Jan 06 2026 - 15:03:33 EST


Hi Krzysztof,

On Mon, 22 Dec 2025 at 11:50, Krzysztof Kozlowski <krzk@xxxxxxxxxx> wrote:
>
> On 22/12/2025 11:22, Peter Griffin wrote:
> > Hi folks,
> >
> > This series addresses an issue with Samsung Exynos based upstream clock driver
> > whereby the upstream clock driver sets all the clock gates into "manual mode"
> > (which uses a bit that is documented as reserved in the gate registers).
> >
>
> Applied.

Thanks.

There were several checkpatch notices/less important warnings
> of which most were result of existing code but few were introduced.
> Please be sure you do not introduce new warnings NEXT TIME.

Will do.

>
> Also, DTS cannot be in the middle of the patchset. It's almost always
> wrong, like in this case as well. This was raised, also by me, multiple
> times on the lists and it is explicitly documented in submitting
> patches. Putting it in the middle suggests you try to fix up broken
> unbisectable things by reordering patches, but you cannot.

Noted. Thanks for pointing this out. I suppose the last time I read
submitting-patches.rst must have been before Feb 25th 2025 when you
documented this rule in b31cc6af1bb1 ("docs: dt: submitting-patches:
Document sending DTS patches")

regards,

Peter