Re: [PATCH 2/4] clk: renesas: r9a09g077: Add CANFD clocks

[Geert Uytterhoeven]

Hi Prabhakar,

On Wed, 24 Dec 2025 at 17:51, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have a CANFD
> peripheral which has three input clocks PCLKM (peripheral clock),
> PCLKH (RAM clock) and PCLKCAN (CANFD clock).
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>

Thanks for your patch!

> --- a/drivers/clk/renesas/r9a09g077-cpg.c
> +++ b/drivers/clk/renesas/r9a09g077-cpg.c

> @@ -251,6 +261,7 @@ static const struct mssr_mod_clk r9a09g077_mod_clks[] __initconst = {
>         DEF_MOD("adc1", 207, R9A09G077_CLK_PCLKH),
>         DEF_MOD("adc2", 225, R9A09G077_CLK_PCLKM),
>         DEF_MOD("tsu", 307, R9A09G077_CLK_PCLKL),
> +       DEF_MOD("canfd", 310, R9A09G077_CLK_PCLKM),

The documentation is a bit confusing (it states that PCLKCAN is the
peripheral module clock for CANFD), but after some more digging,
PCLKM seems to be correct here.

>         DEF_MOD("gmac0", 400, R9A09G077_CLK_PCLKM),
>         DEF_MOD("ethsw", 401, R9A09G077_CLK_PCLKM),
>         DEF_MOD("ethss", 403, R9A09G077_CLK_PCLKM),

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-clk for v6.20.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds