Re: [PATCH 1/3] dt-bindings: watchdog: Add support for Andes ATCWDT200

[Krzysztof Kozlowski]

On 07/01/2026 15:50, CL Wang wrote:
> Add the devicetree binding documentation for the Andes ATCWDT200
> watchdog timer, including supported properties and usage examples.

Last part is redundant. Can you add a binding without supported
properties and without usage examples?

> 
> Signed-off-by: CL Wang <cl634@xxxxxxxxxxxxx>
> ---
>  .../watchdog/andestech,ae350-wdt.yaml         | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/watchdog/andestech,ae350-wdt.yaml
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/andestech,ae350-wdt.yaml b/Documentation/devicetree/bindings/watchdog/andestech,ae350-wdt.yaml
> new file mode 100644
> index 000000000000..4726bd6734d8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/watchdog/andestech,ae350-wdt.yaml
> @@ -0,0 +1,48 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/watchdog/andestech,ae350-wdt.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Andes ATCWDT200 Watchdog Timer
> +
> +maintainers:
> +  - CL Wang <cl634@xxxxxxxxxxxxx>
> +
> +allOf:
> +  - $ref: watchdog.yaml#
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - enum:
> +              - andestech,qilai-wdt
> +          - const: andestech,ae350-wdt
> +      - const: andestech,ae350-wdt

Subject says WDT200, this code sais 350 and qilai. What is what? You
have entire commit msg to explain that
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  andestech,clock-source:

No clue what's this, but for sure does not pass tests without
description and type.

> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - andestech,clock-source
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    watchdog@f0500000 {
> +        compatible = "andestech,ae350-wdt";
> +        reg = <0xf0500000 0x20>;
> +        clocks = <&clk_wdt>;
> +        andestech,clock-source = <0>;
> +    };


Best regards,
Krzysztof