[PATCH v2 0/3] pinctrl: spacemit: support I/O power domain configuration
From: Troy Mitchell
Date: Thu Jan 08 2026 - 01:51:28 EST
This series adds support for configuring IO power domain voltage for
dual-voltage GPIO banks on the Spacemit K1 SoC.
On K1, IO domain power control registers determine whether a GPIO bank
operates at 1.8V or 3.3V. These registers default to 3.3V operation,
which may lead to functional failures when GPIO banks are externally
supplied with 1.8V but internally remain configured for 3.3V.
The IO power domain registers are implemented as secure registers and
require an explicit unlock sequence via the AIB Secure Access Register
(ASAR), located in the APBC register space.
This series ensures that pin voltage configuration correctly reflects
hardware requirements.
Signed-off-by: Troy Mitchell <troy.mitchell@xxxxxxxxxxxxxxxxxx>
---
Troy Mitchell (3):
dt-bindings: pinctrl: spacemit: add syscon property
pinctrl: spacemit: support I/O power domain configuration
riscv: dts: spacemit: modify pinctrl node in dtsi
.../bindings/pinctrl/spacemit,k1-pinctrl.yaml | 5 +
arch/riscv/boot/dts/spacemit/k1.dtsi | 3 +-
drivers/pinctrl/spacemit/pinctrl-k1.c | 129 ++++++++++++++++++++-
3 files changed, 133 insertions(+), 4 deletions(-)
---
base-commit: 168d19e604855cfa6024e9854f8ea9b1c8efa2d9
change-id: 20251223-kx-pinctrl-aib-io-pwr-domain-b02da255f95c
Best regards,
--
Troy Mitchell <troy.mitchell@xxxxxxxxxxxxxxxxxx>