Re: [PATCH v2 2/2] pinctrl: qcom: sa8775p-lpass-lpi: Add SA8775P LPASS pinctrl

[Krzysztof Kozlowski]

On Thu, Jan 08, 2026 at 12:50:07AM +0530, Mohammad Rafi Shaik wrote:
> Add pin control support for Low Power Audio SubSystem (LPASS)
> of Qualcomm SA8775P SoC.
> 
> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@xxxxxxxxxxxxxxxx>
> ---
>  drivers/pinctrl/qcom/Kconfig                  |  10 +
>  drivers/pinctrl/qcom/Makefile                 |   1 +
>  .../pinctrl/qcom/pinctrl-sa8775p-lpass-lpi.c  | 216 ++++++++++++++++++
>  3 files changed, 227 insertions(+)
>  create mode 100644 drivers/pinctrl/qcom/pinctrl-sa8775p-lpass-lpi.c
> 
> diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
> index c480e8b78503..bb1524243906 100644
> --- a/drivers/pinctrl/qcom/Kconfig
> +++ b/drivers/pinctrl/qcom/Kconfig
> @@ -60,6 +60,16 @@ config PINCTRL_LPASS_LPI
>  	  Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
>  	  (Low Power Island) found on the Qualcomm Technologies Inc SoCs.
>  
> +config PINCTRL_SA8775P_LPASS_LPI
> +	tristate "Qualcomm Technologies Inc SA8775P LPASS LPI pin controller driver"
> +	depends on ARM64 || COMPILE_TEST
> +	depends on PINCTRL_LPASS_LPI
> +	help
> +	  This is the pinctrl, pinmux, pinconf and gpiolib driver for the
> +	  Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
> +	  (Low Power Island) found on the Qualcomm Technologies Inc SA8775P
> +	  platform.
> +
>  config PINCTRL_SC7280_LPASS_LPI
>  	tristate "Qualcomm Technologies Inc SC7280 LPASS LPI pin controller driver"
>  	depends on ARM64 || COMPILE_TEST
> diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
> index 748b17a77b2c..b2a23a824846 100644
> --- a/drivers/pinctrl/qcom/Makefile
> +++ b/drivers/pinctrl/qcom/Makefile
> @@ -39,6 +39,7 @@ obj-$(CONFIG_PINCTRL_QCOM_SSBI_PMIC) += pinctrl-ssbi-gpio.o
>  obj-$(CONFIG_PINCTRL_QCOM_SSBI_PMIC) += pinctrl-ssbi-mpp.o
>  obj-$(CONFIG_PINCTRL_QDU1000)	+= pinctrl-qdu1000.o
>  obj-$(CONFIG_PINCTRL_SA8775P)	+= pinctrl-sa8775p.o
> +obj-$(CONFIG_PINCTRL_SA8775P_LPASS_LPI) += pinctrl-sa8775p-lpass-lpi.o
>  obj-$(CONFIG_PINCTRL_SAR2130P)	+= pinctrl-sar2130p.o
>  obj-$(CONFIG_PINCTRL_SC7180)	+= pinctrl-sc7180.o
>  obj-$(CONFIG_PINCTRL_SC7280)	+= pinctrl-sc7280.o
> diff --git a/drivers/pinctrl/qcom/pinctrl-sa8775p-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sa8775p-lpass-lpi.c
> new file mode 100644
> index 000000000000..4579a079f7c6
> --- /dev/null
> +++ b/drivers/pinctrl/qcom/pinctrl-sa8775p-lpass-lpi.c
> @@ -0,0 +1,216 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +#include <linux/gpio/driver.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +
> +#include "pinctrl-lpass-lpi.h"
> +
> +enum lpass_lpi_functions {
> +	LPI_MUX_dmic1_clk,
> +	LPI_MUX_dmic1_data,
> +	LPI_MUX_dmic2_clk,
> +	LPI_MUX_dmic2_data,
> +	LPI_MUX_dmic3_clk,
> +	LPI_MUX_dmic3_data,
> +	LPI_MUX_dmic4_clk,
> +	LPI_MUX_dmic4_data,
> +	LPI_MUX_i2s1_clk,
> +	LPI_MUX_i2s1_data,
> +	LPI_MUX_i2s1_ws,
> +	LPI_MUX_i2s2_clk,
> +	LPI_MUX_i2s2_data,
> +	LPI_MUX_i2s2_ws,
> +	LPI_MUX_i2s3_clk,
> +	LPI_MUX_i2s3_data,
> +	LPI_MUX_i2s3_ws,
> +	LPI_MUX_i2s4_clk,
> +	LPI_MUX_i2s4_data,
> +	LPI_MUX_i2s4_ws,
> +	LPI_MUX_qua_mi2s_data,
> +	LPI_MUX_qua_mi2s_sclk,
> +	LPI_MUX_qua_mi2s_ws,
> +	LPI_MUX_slimbus_clk,
> +	LPI_MUX_slimbus_data,
> +	LPI_MUX_swr_rx_clk,
> +	LPI_MUX_swr_rx_data,
> +	LPI_MUX_swr_tx_clk,
> +	LPI_MUX_swr_tx_data,
> +	LPI_MUX_wsa_swr_clk,
> +	LPI_MUX_wsa_swr_data,
> +	LPI_MUX_wsa2_swr_clk,
> +	LPI_MUX_wsa2_swr_data,
> +	LPI_MUX_ext_mclk1_a,
> +	LPI_MUX_ext_mclk1_b,
> +	LPI_MUX_ext_mclk1_c,
> +	LPI_MUX_ext_mclk1_d,
> +	LPI_MUX_ext_mclk1_e,
> +	LPI_MUX_gpio,
> +	LPI_MUX__,
> +};

Isn't this entire driver exactly the same as sm8450?

Best regards,
Krzysztof