[PATCH v3 0/1] Add support for GPIO IRQs for RZ/T2H and RZ/N2H

[Cosmin Tanislav]

The Renesas RZ/T2H and RZ/N2H SoCs have IRQ-capable pins handled by the
ICU, which forwards them to the GIC.

The ICU supports 16 IRQ lines, the pins map to these lines arbitrarily,
and the mapping is not configurable.

Add a GPIO IRQ chip that can be used to configure these pins as IRQ
lines, and add the user switches present on the board.

V3:
 * drop patches queued up by Geert
 * adjust comment describing the source of truth for the data inside
   rzt2h_gpio_irq_map
 * check if interrupt-controller property is present before populating
   GPIO's IRQ chip
 * move rzt2h_pinctrl_suspend_noirq() above rzt2h_pinctrl_pm_ops

V2:
 * drop interrupt-controller and #interrupt-cells from required to keep
   compatibility
 * select GPIOLIB_IRQCHIP
 * select IRQ_DOMAIN_HIERARCHY
 * add comment to clarify wakeup_path atomic usage
 * add more details to the commit message, including usage of the
   hierarchical IRQ domain and wakeup capability implementation

Cosmin Tanislav (1):
  pinctrl: renesas: rzt2h: add GPIO IRQ chip to handle interrupts

 drivers/pinctrl/renesas/Kconfig         |   2 +
 drivers/pinctrl/renesas/pinctrl-rzt2h.c | 203 ++++++++++++++++++++++++
 2 files changed, 205 insertions(+)

-- 
2.52.0