Re: [PATCH 2/3] media: rzg2l-cru: Use only frame end interrupts for DMA stopping state

From: Lad, Prabhakar

Date: Fri Jan 09 2026 - 17:10:57 EST


On Tue, Dec 30, 2025 at 5:16 PM Tommaso Merciai
<tommaso.merciai.xr@xxxxxxxxxxxxxx> wrote:
>
> On RZ/G3E the CRU driver relies on frame end interrupts to detect the
> completion of an active frame when stopping DMA.
>
> Update the driver to enable only frame end interrupts (CRUnIE2_FExE),
> dropping the use of frame start interrupts, which are not required for
> this flow.
>
> Fix the interrupt status handling in the DMA stopping state by checking
> the correct frame end status bits (FExS) instead of the frame start ones
> (FSxS). Add a dedicated CRUnINTS2_FExS() macro to reflect the actual
> register bit layout.
>
> This ensures that DMA stopping is triggered by the intended frame end
> events and avoids incorrect interrupt handling.
>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@xxxxxxxxxxxxxx>
> ---
> .../media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h | 1 +
> drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c | 9 ++++-----
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>

Cheers,
Prabhakar

> diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h
> index a5a57369ef0e..102a2fec5037 100644
> --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h
> +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h
> @@ -19,6 +19,7 @@
>
> #define CRUnINTS_SFS BIT(16)
>
> +#define CRUnINTS2_FExS(x) BIT(((x) * 3) + 1)
> #define CRUnINTS2_FSxS(x) BIT(((x) * 3))
>
> #define CRUnRST_VRESETN BIT(0)
> diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
> index 480e9b5dbcfe..34e74e5796e8 100644
> --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
> +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
> @@ -437,7 +437,6 @@ static int rzg2l_cru_get_virtual_channel(struct rzg2l_cru_dev *cru)
>
> void rzg3e_cru_enable_interrupts(struct rzg2l_cru_dev *cru)
> {
> - rzg2l_cru_write(cru, CRUnIE2, CRUnIE2_FSxE(cru->svc_channel));
> rzg2l_cru_write(cru, CRUnIE2, CRUnIE2_FExE(cru->svc_channel));
> }
>
> @@ -697,10 +696,10 @@ irqreturn_t rzg3e_cru_irq(int irq, void *data)
> }
>
> if (cru->state == RZG2L_CRU_DMA_STOPPING) {
> - if (irq_status & CRUnINTS2_FSxS(0) ||
> - irq_status & CRUnINTS2_FSxS(1) ||
> - irq_status & CRUnINTS2_FSxS(2) ||
> - irq_status & CRUnINTS2_FSxS(3))
> + if (irq_status & CRUnINTS2_FExS(0) ||
> + irq_status & CRUnINTS2_FExS(1) ||
> + irq_status & CRUnINTS2_FExS(2) ||
> + irq_status & CRUnINTS2_FExS(3))
> dev_dbg(cru->dev, "IRQ while state stopping\n");
> return IRQ_HANDLED;
> }
> --
> 2.43.0
>
>