Re: [PATCH v9 1/4] drm/panthor: Rework panthor_irq::suspended into panthor_irq::state

From: Boris Brezillon

Date: Thu Jan 15 2026 - 09:55:32 EST


On Thu, 15 Jan 2026 14:58:59 +0100
Nicolas Frattaroli <nicolas.frattaroli@xxxxxxxxxxxxx> wrote:

> To deal with the threaded interrupt handler and a suspend action
> overlapping, the boolean panthor_irq::suspended is not sufficient.
>
> Rework it into taking several different values depending on the current
> state, and check it and set it within the IRQ helper functions.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@xxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/panthor/panthor_device.h | 32 ++++++++++++++++++++++++++------
> 1 file changed, 26 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h
> index f35e52b9546a..2bf9a8434dc5 100644
> --- a/drivers/gpu/drm/panthor/panthor_device.h
> +++ b/drivers/gpu/drm/panthor/panthor_device.h
> @@ -61,6 +61,17 @@ enum panthor_device_pm_state {
> PANTHOR_DEVICE_PM_STATE_SUSPENDING,
> };
>
> +enum panthor_irq_state {
> + /** @PANTHOR_IRQ_STATE_ACTIVE: IRQ is active and ready to process events. */
> + PANTHOR_IRQ_STATE_ACTIVE = 0,
> + /** @PANTHOR_IRQ_STATE_PROCESSING: IRQ is currently processing events. */
> + PANTHOR_IRQ_STATE_PROCESSING,
> + /** @PANTHOR_IRQ_STATE_SUSPENDED: IRQ is suspended. */
> + PANTHOR_IRQ_STATE_SUSPENDED,
> + /** @PANTHOR_IRQ_STATE_SUSPENDING: IRQ is being suspended. */
> + PANTHOR_IRQ_STATE_SUSPENDING,
> +};
> +
> /**
> * struct panthor_irq - IRQ data
> *
> @@ -76,8 +87,8 @@ struct panthor_irq {
> /** @mask: Current mask being applied to xxx_INT_MASK. */
> u32 mask;
>
> - /** @suspended: Set to true when the IRQ is suspended. */
> - atomic_t suspended;
> + /** @state: one of &enum panthor_irq_state reflecting the current state. */
> + atomic_t state;
> };
>
> /**
> @@ -409,8 +420,10 @@ static irqreturn_t panthor_ ## __name ## _irq_raw_handler(int irq, void *data)
> { \
> struct panthor_irq *pirq = data; \
> struct panthor_device *ptdev = pirq->ptdev; \
> + enum panthor_irq_state state; \
> \
> - if (atomic_read(&pirq->suspended)) \
> + state = atomic_read(&pirq->state); \
> + if (state == PANTHOR_IRQ_STATE_SUSPENDED || state == PANTHOR_IRQ_STATE_SUSPENDING) \
> return IRQ_NONE; \
> if (!gpu_read(ptdev, __reg_prefix ## _INT_STAT)) \
> return IRQ_NONE; \

I was imagining something like:

if (!gpu_read(ptdev, __reg_prefix ## _INT_STAT))
return IRQ_NONE;

old_state = atomic_cmpxchg(&pirq->state,
PANTHOR_IRQ_STATE_ACTIVE,
PANTHOR_IRQ_STATE_PROCESSING);
if (old_state != PANTHOR_IRQ_STATE_ACTIVE)
return IRQ_NONE;

such that the processing phase starts as soon as we know we're going to
wake up the irq thread, not when we enter the threaded handler.

> @@ -423,8 +436,11 @@ static irqreturn_t panthor_ ## __name ## _irq_threaded_handler(int irq, void *da
> { \
> struct panthor_irq *pirq = data; \
> struct panthor_device *ptdev = pirq->ptdev; \
> + enum panthor_irq_state state; \
> irqreturn_t ret = IRQ_NONE; \
> \
> + atomic_cmpxchg(&pirq->state, PANTHOR_IRQ_STATE_ACTIVE, PANTHOR_IRQ_STATE_PROCESSING); \

I think this is better done in the raw_handler (see above).

> + \
> while (true) { \
> u32 status = gpu_read(ptdev, __reg_prefix ## _INT_RAWSTAT) & pirq->mask; \
> \
> @@ -435,8 +451,11 @@ static irqreturn_t panthor_ ## __name ## _irq_threaded_handler(int irq, void *da
> ret = IRQ_HANDLED; \
> } \
> \
> - if (!atomic_read(&pirq->suspended)) \
> + state = atomic_read(&pirq->state); \
> + if (state != PANTHOR_IRQ_STATE_SUSPENDED && state != PANTHOR_IRQ_STATE_SUSPENDING) { \
> gpu_write(ptdev, __reg_prefix ## _INT_MASK, pirq->mask); \
> + atomic_set(&pirq->state, PANTHOR_IRQ_STATE_ACTIVE); \
> + } \

Similarly, I think I'd go for

old_state = atomic_cmpxchg(&pirq->state,
PANTHOR_IRQ_STATE_PROCESSING,
PANTHOR_IRQ_STATE_ACTIVE);
if (old_state == PANTHOR_IRQ_STATE_PROCESSING)
gpu_write(ptdev, __reg_prefix ## _INT_MASK, pirq->mask);

> \
> return ret; \
> } \
> @@ -445,14 +464,15 @@ static inline void panthor_ ## __name ## _irq_suspend(struct panthor_irq *pirq)
> { \
> pirq->mask = 0; \
> gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, 0); \
> + atomic_set(&pirq->state, PANTHOR_IRQ_STATE_SUSPENDING); \
> synchronize_irq(pirq->irq); \
> - atomic_set(&pirq->suspended, true); \
> + atomic_set(&pirq->state, PANTHOR_IRQ_STATE_SUSPENDED); \
> } \
> \
> static inline void panthor_ ## __name ## _irq_resume(struct panthor_irq *pirq, u32 mask) \
> { \
> - atomic_set(&pirq->suspended, false); \
> pirq->mask = mask; \
> + atomic_set(&pirq->state, PANTHOR_IRQ_STATE_ACTIVE); \
> gpu_write(pirq->ptdev, __reg_prefix ## _INT_CLEAR, mask); \
> gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, mask); \
> } \
>