[PATCH 2/6] arm64: dts: amlogic: a1: align the mmc clock setup
From: Jerome Brunet
Date: Wed Jan 14 2026 - 12:09:23 EST
The amlogic MMC driver operate with the assumption that MMC clock
is configured to provide 24MHz. It uses this path for low
rates such as 400kHz.
A1 is particular in the way that is already has the mmc clock set
to 24MHz by forcing the mux to select the board crystal. It works
too, it is just slightly less readable.
Align with what is being done with the other Amlogic platforms.
Signed-off-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index 27b68ed85c4c..348411411f3d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
@@ -674,11 +674,12 @@ sd_emmc: mmc@10000 {
clock-names = "core",
"clkin0",
"clkin1";
- assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_SEL2>;
- assigned-clock-parents = <&xtal>;
resets = <&reset RESET_SD_EMMC_A>;
power-domains = <&pwrc PWRC_SD_EMMC_ID>;
status = "disabled";
+
+ assigned-clocks = <&clkc_periphs CLKID_SD_EMMC>;
+ assigned-clock-rates = <24000000>;
};
};
--
2.47.3