Re: [PATCH v4 3/4] arm64: dts: qcom: Introduce Glymur base dtsi
From: Bjorn Andersson
Date: Tue Jan 13 2026 - 23:17:43 EST
On Mon, Jan 12, 2026 at 05:52:36PM +0530, Pankaj Patil wrote:
> Introduce the base device tree support for Glymur – Qualcomm's
> next-generation compute SoC. The new glymur.dtsi describes the core SoC
> components, including:
>
> - CPUs and CPU topology
> - Interrupt controller and TLMM
> - GCC,DISPCC and RPMHCC clock controllers
> - Reserved memory and interconnects
> - APPS and PCIe SMMU and firmware SCM
> - Watchdog, RPMHPD, APPS RSC and SRAM
> - PSCI and PMU nodes
> - QUPv3 serial engines
> - CPU power domains and idle states, plus SCMI/ SRAM pieces for CPU DVFS
> - PDP0 mailbox, IPCC and AOSS
> - Display clock controller
> - SPMI PMIC arbiter with SPMI0/1/2 buses
> - SMP2P nodes
> - TSENS and thermal zones (8 instances, 92 sensors)
>
> Add dtsi files for PMH0101, PMK8850, PMCX0102, SMB2370, PMH0104,
> PMH0110 along with temp-alarm and GPIO nodes needed on Glymur
>
> Enabled PCIe controllers and associated PHY to support boot to
> shell with nvme storage,
> List of PCIe instances enabled:
>
> - PCIe3b
> - PCIe4
> - PCIe5
> - PCIe6
>
Why didn't you run "make qcom/glymur-crd.dtb CHECK_DTBS=1" before
sending patches to the mailing list?!
It would taken you 30 seconds to conclude that I can't do anything with
these patches.
Regards,
Bjorn