Re: [PATCH v3 1/8] media: qcom: camss: csiphy: Introduce PHY configuration

[Bryan O'Donoghue]

On 17/01/2026 15:36, David Heidelberg via B4 Relay wrote:
> +	if (lncfg->phy_cfg != V4L2_MBUS_CSI2_CPHY) {
> +		lncfg->clk.pos = mipi_csi2->clock_lane;
> +		lncfg->clk.pol = mipi_csi2->lane_polarities[0];
> +	}

Just wondering as I look at this code; is it possible to set clock_lane 
to say 0xff in DT ?

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bod