[PATCH 2/2] riscv: dts: canaan: add reset controller for K230

From: Junhui Liu

Date: Sat Jan 17 2026 - 05:12:26 EST

Add the reset controller node for the K230 SoC. Also add the reset
properties for all UART nodes.

Signed-off-by: Junhui Liu <junhui.liu@xxxxxxxxxxxxx>
---
arch/riscv/boot/dts/canaan/k230.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/arch/riscv/boot/dts/canaan/k230.dtsi b/arch/riscv/boot/dts/canaan/k230.dtsi
index 5a1bf8a15abe..45041bd6df1a 100644
--- a/arch/riscv/boot/dts/canaan/k230.dtsi
+++ b/arch/riscv/boot/dts/canaan/k230.dtsi
@@ -4,6 +4,7 @@
*/

#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/reset/canaan,k230-rst.h>
#include "k230-pinctrl.h"

/dts-v1/;
@@ -87,6 +88,12 @@ clint: timer@f04000000 {
interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
};

+ rst: reset-controller@91101000 {
+ compatible = "canaan,k230-rst";
+ reg = <0x0 0x91101000 0x0 0x1000>;
+ #reset-cells = <1>;
+ };
+
pinctrl: pinctrl@91105000 {
compatible = "canaan,k230-pinctrl";
reg = <0x0 0x91105000 0x0 0x100>;
@@ -99,6 +106,7 @@ uart0: serial@91400000 {
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
+ resets = <&rst RST_UART0>;
status = "disabled";
};

@@ -109,6 +117,7 @@ uart1: serial@91401000 {
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
+ resets = <&rst RST_UART1>;
status = "disabled";
};

@@ -119,6 +128,7 @@ uart2: serial@91402000 {
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
+ resets = <&rst RST_UART2>;
status = "disabled";
};

@@ -129,6 +139,7 @@ uart3: serial@91403000 {
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
+ resets = <&rst RST_UART3>;
status = "disabled";
};

@@ -139,6 +150,7 @@ uart4: serial@91404000 {
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <4>;
reg-shift = <2>;
+ resets = <&rst RST_UART4>;
status = "disabled";
};
};

--
2.52.0