Re: [PATCH v7 net-next 4/4] net: dsa: add basic initial driver for MxL862xx switches
From: Simon Horman
Date: Wed Jan 21 2026 - 11:59:37 EST
On Sun, Jan 18, 2026 at 03:46:07AM +0000, Daniel Golle wrote:
...
> +static int mxl862xx_isolate_port(struct dsa_switch *ds, int port)
> +{
> + struct mxl862xx_bridge_port_config br_port_cfg = {};
> + struct mxl862xx_bridge_alloc br_alloc = {};
> + int ret;
> +
> + ret = MXL862XX_API_READ(ds->priv, MXL862XX_BRIDGE_ALLOC, br_alloc);
> + if (ret) {
> + dev_err(ds->dev, "failed to allocate a bridge for port %d\n", port);
> + return ret;
> + }
> +
> + br_port_cfg.bridge_id = br_alloc.bridge_id;
> + br_port_cfg.bridge_port_id = DSA_MXL_PORT(port);
> + br_port_cfg.mask = MXL862XX_BRIDGE_PORT_CONFIG_MASK_BRIDGE_ID |
> + MXL862XX_BRIDGE_PORT_CONFIG_MASK_BRIDGE_PORT_MAP |
> + MXL862XX_BRIDGE_PORT_CONFIG_MASK_MC_SRC_MAC_LEARNING |
> + MXL862XX_BRIDGE_PORT_CONFIG_MASK_VLAN_BASED_MAC_LEARNING;
> + br_port_cfg.src_mac_learning_disable = true;
> + br_port_cfg.vlan_src_mac_vid_enable = false;
> + br_port_cfg.vlan_dst_mac_vid_enable = false;
> + br_port_cfg.bridge_port_map[0] = DSA_MXL_CPU_PORTS(ds);
Hi Daniel,
.bridge_port_id, .mask, and elements of .bridge_port_map[]
are little-endian integers. But are being assigned host byte-order
values here and elsewhere.
Flagged by Sparse [1].
[1] This particular commit, from Al Viro's tree:
https://git.kernel.org/pub/scm/linux/kernel/git/viro/sparse.git/commit/?id=2634e39bf02697a18fece057208150362c985992
To address this mess:
https://lore.kernel.org/all/bf5b9a62-a120-421e-908d-1404c42e0b60@xxxxxxxxxx/
> +
> + return MXL862XX_API_WRITE(ds->priv, MXL862XX_BRIDGEPORT_CONFIGSET, br_port_cfg);
> +}
...
--
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