Re: [PATCH v6 2/9] x86/bhi: Make clear_bhb_loop() effective on newer CPUs
From: Borislav Petkov
Date: Sat Jan 24 2026 - 14:34:58 EST
On Mon, Dec 01, 2025 at 10:19:14PM -0800, Pawan Gupta wrote:
> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
> index 886f86790b4467347031bc27d3d761d5cc286da1..9f6f4a7c5baf1fe4e3ab18b11e25e2fbcc77489d 100644
> --- a/arch/x86/entry/entry_64.S
> +++ b/arch/x86/entry/entry_64.S
> @@ -1536,7 +1536,11 @@ SYM_FUNC_START(clear_bhb_loop)
> ANNOTATE_NOENDBR
> push %rbp
> mov %rsp, %rbp
> - movl $5, %ecx
> +
> + /* loop count differs based on BHI_CTRL, see Intel's BHI guidance */
> + ALTERNATIVE "movl $5, %ecx; movl $5, %edx", \
> + "movl $12, %ecx; movl $7, %edx", X86_FEATURE_BHI_CTRL
Why isn't this written like this:
in C:
clear_bhb_loop:
if (cpu_feature_enabled(X86_FEATURE_BHI_CTRL))
__clear_bhb_loop(12, 7);
else
__clear_bhb_loop(5, 5);
and then the __-version is asm and it gets those two arguments from %rdi, and
%rsi instead of more hard-coded, error-prone registers diddling alternative
gunk?
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette