Re: [PATCH v3 4/7] arm64: dts: qcom: sc8280xp: Add Venus

[Konrad Dybcio]

On 1/25/26 4:33 PM, Dmitry Baryshkov wrote:
> From: Konrad Dybcio <konradybcio@xxxxxxxxxx>
> 
> Add the required nodes to enable Venus on sc8280xp.
> 
> [ bod: added interconnect tags ]
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
> [ johan: use sm8350 videocc defines ]
> Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
> [ bod: dropped video encoder/decoder declarations ]
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx>
> [ db: dropped llcc icc, switched to sc8280xp compat, added more freqs ]
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
> ---

[...]

> +			venus_opp_table: opp-table {
> +				compatible = "operating-points-v2";
> +
> +				opp-720000000 {
> +					opp-hz = /bits/ 64 <720000000>;

You need to div3 all of these, otherwise this LOW_SVS OPP
will actually apply a more-than-TURBO_L1-requiring frequency..

[...]
> +		videocc: clock-controller@abf0000 {
> +			compatible = "qcom,sc8280xp-videocc";
> +			reg = <0 0x0abf0000 0 0x10000>;
> +			clocks = <&rpmhcc RPMH_CXO_CLK>,
> +				 <&rpmhcc RPMH_CXO_CLK_A>,
> +				 <&sleep_clk>;
> +			power-domains = <&rpmhpd SC8280XP_MMCX>;
> +			required-opps = <&rpmhpd_opp_low_svs>;

AFAICS the PLLs will not turn on if *MX* is at < LOWSVS, but they still
need to be scaled 1:1 with MMCX as the freuqency rises, so you need to
wire up 2 power domains to the OPP table

PLL0 supplies core0 (iris) and PLL1 supplies core1 (CVP)

Konrad