Re: [PATCH v10 5/8] dt-bindings: arm: add an interrupt property for Coresight CTCU

[Jie Gan]

On 1/27/2026 1:22 AM, Suzuki K Poulose wrote:
> On 22/01/2026 02:08, Jie Gan wrote:
> > Add an interrupt property to CTCU device. The interrupt will be triggered
> > when the data size in the ETR buffer exceeds the threshold of the
> > BYTECNTRVAL register. Programming a threshold in the BYTECNTRVAL register
> > of CTCU device will enable the interrupt.
> >
> > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> > Reviewed-by: Mike Leach <mike.leach@xxxxxxxxxx>
> > Signed-off-by: Jie Gan <jie.gan@xxxxxxxxxxxxxxxx>
> > ---
> >   Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml | 10 
> > ++++++++++
> >   1 file changed, 10 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight- 
> > ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight- 
> > ctcu.yaml
> > index c969c16c21ef..ac27a8b89085 100644
> > --- a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> > +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
> > @@ -39,6 +39,11 @@ properties:
> >       items:
> >         - const: apb
> > +  interrupts:
> > +    items:
> > +      - description: Interrupt for the ETR device connected to in-port0.
> > +      - description: Interrupt for the ETR device connected to in-port1.
>
> Is this all the hardware supports ? i.e., can it only have two ports 
> ever ? If not, why restrict it to two ?

The maximum number of the TMC ETR devices of the existed QCOM platforms 
is 2. Per Krzysztof's suggestion in the earlier version, I limited the 
port number to [0..1], so as well as the interrupts.

Thanks,
Jie


> Suzuki
>
>
> > +
> >     label:
> >       description:
> >         Description of a coresight device.
> > @@ -60,6 +65,8 @@ additionalProperties: false
> >   examples:
> >     - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> >       ctcu@1001000 {
> >           compatible = "qcom,sa8775p-ctcu";
> >           reg = <0x1001000 0x1000>;
> > @@ -67,6 +74,9 @@ examples:
> >           clocks = <&aoss_qmp>;
> >           clock-names = "apb";
> > +        interrupts = <GIC_SPI 270 IRQ_TYPE_EDGE_RISING>,
> > +                     <GIC_SPI 262 IRQ_TYPE_EDGE_RISING>;
> > +
> >           in-ports {
> >               #address-cells = <1>;
> >               #size-cells = <0>;