Re: [PATCH v10 00/13] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement

[Dave Jiang]

On 1/27/26 4:02 AM, Robert Richter wrote:
> Dave,
> 
> On 14.01.26 17:48:16, Robert Richter wrote:
>> This patch set adds support for address translation using ACPI PRM and
>> enables this for AMD Zen5 platforms. The current approach bases on v4
>> and is in response to earlier attempts to implement CXL address
>> translation:
>>
>>  * v1: [1] and the comments on it, esp. Dan's [2],
>>  * v2: [3] and comments on [4], esp. Dave's [5],
>>  * v3: [6] and comments on it, esp. Dave's [7],
>>  * v4: [8].
>>
>> In this version there are a view minor but no major changes. See the
>> changelog for details. Thank you all for your reviews and testing.
>>
>> Documentation of CXL Address Translation Support will be added to the
>> Kernel's "Compute Express Link: Linux Conventions". This patch
>> submission will be the base for a documentation patch that describes CXL
>> Address Translation support accordingly.
>>
>> The CXL driver currently does not implement address translation which
>> assumes the host physical addresses (HPA) and system physical
>> addresses (SPA) are equal.
>>
>> Systems with different HPA and SPA addresses need address translation.
>> If this is the case, the hardware addresses esp. used in the HDM
>> decoder configurations are different to the system's or parent port
>> address ranges. E.g. AMD Zen5 systems may be configured to use
>> 'Normalized addresses'. Then, CXL endpoints have their own physical
>> address base which is not the same as the SPA used by the CXL host
>> bridge. Thus, addresses need to be translated from the endpoint's to
>> its CXL host bridge's address range.
>>
>> To enable address translation, the endpoint's HPA range must be
>> translated to the CXL host bridge's address range. A callback is
>> introduced to translate a decoder's HPA to the CXL host bridge's
>> address range. The callback is then used to determine the region
>> parameters which includes the SPA translated address range of the
>> endpoint decoder and the interleaving configuration. This is stored in
>> struct cxl_region which allows an endpoint decoder to determine that
>> parameters based on its assigned region.
>>
>> Note that only auto-discovery of decoders is supported. Thus, decoders
>> are locked and cannot be configured manually.
>>
>> Finally, Zen5 address translation is enabled using ACPI PRMT.
>>
>> This series bases on v6.19-rc1.
>>
>> V10:
>>  * updated sob-chains,
>>  * renamed flags to CXL_*_F_NORMALIZED_ADDRESSING (Dave),
>>  * fixed spelling in 07/13 patch description (Alison),
>>  * be more precise on poison support in 12/13 patch description (Alison),
> 
> are you fine with the series? I have also submitted the documentation
> update with the changes Dan requested, see this one:
> 
>  [PATCH v4 3/3] Documentation/driver-api/cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement
> 
> I don't see any open items. Should I resend a v11 with all remaining
> reviewed-by tags and the small update in the description of 13/13?
> Please let me know.

Hi Robert, I have both the doc and the code series locally queued and was waiting to see if there are any additional discussion or objections around PRM usage. I plan to merge it with cxl/next this week. Thanks for the reminder of the small update for 13/13.

> 
> Thanks,
> 
> -Robert