Re: [PATCH v2 6/6] clk: qcom: Add TCSR clock driver for Eliza

[Abel Vesa]

On 26-01-28 11:34:49, Konrad Dybcio wrote:
> On 1/27/26 4:03 PM, Abel Vesa wrote:
> > Add the TCSR clock controller that provides the refclks on Eliza
> > platform for PCIe, USB and UFS subsystems.
> > 
> > Co-developed-by: Taniya Das <taniya.das@xxxxxxxxxxxxxxxx>
> > Signed-off-by: Taniya Das <taniya.das@xxxxxxxxxxxxxxxx>
> > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxxxxxxxx>
> > ---
> 
> [...]
> 
> > +++ b/drivers/clk/qcom/tcsrcc-eliza.c
> > @@ -0,0 +1,144 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> > + */
> > +
> > +#include <linux/clk-provider.h>
> > +#include <linux/mod_devicetable.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/regmap.h>
> > +
> > +#include <dt-bindings/clock/qcom,eliza-tcsr.h>
> > +
> > +#include "clk-branch.h"
> > +#include "clk-regmap.h"
> > +#include "common.h"
> > +
> > +enum {
> > +	DT_BI_TCXO_PAD,
> > +};
> > +
> > +static struct clk_branch tcsr_pcie_0_clkref_en = {
> > +	.halt_reg = 0x0,
> 
> These regs certainly aren't at +0x0 to what we normally expect to
> be the start of the TCSR node

They are if we add the TCSR node with reg range starting at 0x1fbf000.

> 
> [...]
> 
> > +static struct clk_regmap *tcsr_cc_eliza_clocks[] = {
> > +	[TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr,
> > +	[TCSR_UFS_CLKREF_EN] = &tcsr_ufs_clkref_en.clkr,
> > +	[TCSR_USB2_CLKREF_EN] = &tcsr_usb2_clkref_en.clkr,
> > +	[TCSR_USB3_CLKREF_EN] = &tcsr_usb3_clkref_en.clkr,
> 
> I don't think this list is complete

Yep, missing the pcie_0 and hdmi. Will add.