Re: [PATCH 1/2] iio: imu: inv-mpu9150: fix irq ack preventing irq storms

[Jean-Baptiste Maneyrol]

>
>________________________________________
>From: Jonathan Cameron <jic23@xxxxxxxxxx>
>Sent: Sunday, January 11, 2026 13:30
>To: akemnade@xxxxxxxxxx <akemnade@xxxxxxxxxx>
>Cc: Jean-Baptiste Maneyrol <Jean-Baptiste.Maneyrol@xxxxxxx>; David Lechner <dlechner@xxxxxxxxxxxx>; Nuno Sá <nuno.sa@xxxxxxxxxx>; Andy Shevchenko <andy@xxxxxxxxxx>; Aaro Koskinen <aaro.koskinen@xxxxxx>; Andreas Kemnade <andreas@xxxxxxxxxxxx>; Kevin Hilman <khilman@xxxxxxxxxxxx>; Roger Quadros <rogerq@xxxxxxxxxx>; Tony Lindgren <tony@xxxxxxxxxxx>; Rob Herring <robh@xxxxxxxxxx>; Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>; Conor Dooley <conor+dt@xxxxxxxxxx>; Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>; linux-iio@xxxxxxxxxxxxxxx <linux-iio@xxxxxxxxxxxxxxx>; linux-kernel@xxxxxxxxxxxxxxx <linux-kernel@xxxxxxxxxxxxxxx>; linux-omap@xxxxxxxxxxxxxxx <linux-omap@xxxxxxxxxxxxxxx>; devicetree@xxxxxxxxxxxxxxx <devicetree@xxxxxxxxxxxxxxx>
>Subject: Re: [PATCH 1/2] iio: imu: inv-mpu9150: fix irq ack preventing irq storms
> 
>On Wed, 31 Dec 2025 22: 14: 16 +0100 akemnade@ kernel. org wrote: > From: Andreas Kemnade <andreas@ kemnade. info> > > IRQ needs to be acked. for some odd reasons, reading from irq status does > not reliable help, enable acking from
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>On Wed, 31 Dec 2025 22:14:16 +0100
>akemnade@xxxxxxxxxx wrote:
>
>> From: Andreas Kemnade <andreas@xxxxxxxxxxxx>
>> 
>> IRQ needs to be acked. for some odd reasons, reading from irq status does
>> not reliable help, enable acking from any register to be on the safe side
>> and read the irq status register. Comments in the code indicate a known
>> unreliability with that register.
>> The blamed commit was tested with mpu6050 in lg,p895 and lg,p880 according
>> to Tested-bys. But with the MPU9150 in the Epson Moverio BT-200 this leads
>> to irq storms without properly acking the irq.
>> 
>> Fixes: 0a3b517c8089 ("iio: imu: inv_mpu6050: fix interrupt status read for old buggy chips")
>> Signed-off-by: Andreas Kemnade <andreas@xxxxxxxxxxxx>
>Jean-Baptiste,
>
>If you have time to look at this that would be great.
>
>Whilst here I'll note the defines in this driver could really do with consistency
>improvements.  I'd like to see GENMASK() and BIT() used everywhere.
>Currently it's mostly the style used in this patch with a few fields in
>the newer style.  
>
>Thanks
>
>Jonathan

Hello Jonathan,

sorry for the late response. This is a very old chip, I'm sorry I won't be
able to check the modification on my side.

By looking at it, it seems correct if it is indeed fixing the issue. I'm
giving my acknowledgement to the patch.

Acked-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@xxxxxxx>

Thanks,
JB

>
>> ---
>>  drivers/iio/imu/inv_mpu6050/inv_mpu_core.c    | 8 ++++++++
>>  drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h     | 2 ++
>>  drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c | 5 ++++-
>>  3 files changed, 14 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
>> index b2fa1f4957a5b..5796896d54cd8 100644
>> --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
>> +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
>> @@ -1943,6 +1943,14 @@ int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
>>  			irq_type);
>>  		return -EINVAL;
>>  	}
>> +
>> +	/*
>> +	 * Acking interrupts by status register does not work reliably
>> +	 * but seem to work when this bit is set.
>> +	 */
>> +	if (st->chip_type == INV_MPU9150)
>> +		st->irq_mask |= INV_MPU6050_INT_RD_CLEAR;
>> +
>>  	device_set_wakeup_capable(dev, true);
>>  
>>  	st->vdd_supply = devm_regulator_get(dev, "vdd");
>> diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h
>> index 211901f8b8eb6..6239b1a803f77 100644
>> --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h
>> +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h
>> @@ -390,6 +390,8 @@ struct inv_mpu6050_state {
>>  /* enable level triggering */
>>  #define INV_MPU6050_LATCH_INT_EN	0x20
>>  #define INV_MPU6050_BIT_BYPASS_EN	0x2
>> +/* allow acking interrupts by any register read */
>> +#define INV_MPU6050_INT_RD_CLEAR	0x10
>>  
>>  /* Allowed timestamp period jitter in percent */
>>  #define INV_MPU6050_TS_PERIOD_JITTER	4
>> diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c
>> index 10a4733420759..22c1ce66f99ee 100644
>> --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c
>> +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c
>> @@ -248,7 +248,6 @@ static irqreturn_t inv_mpu6050_interrupt_handle(int irq, void *p)
>>  	switch (st->chip_type) {
>>  	case INV_MPU6000:
>>  	case INV_MPU6050:
>> -	case INV_MPU9150:
>>  		/*
>>  		 * WoM is not supported and interrupt status read seems to be broken for
>>  		 * some chips. Since data ready is the only interrupt, bypass interrupt
>> @@ -257,6 +256,10 @@ static irqreturn_t inv_mpu6050_interrupt_handle(int irq, void *p)
>>  		wom_bits = 0;
>>  		int_status = INV_MPU6050_BIT_RAW_DATA_RDY_INT;
>>  		goto data_ready_interrupt;
>> +	case INV_MPU9150:
>> +		/* IRQ needs to be acked */
>> +		wom_bits = 0;
>> +		break;
>>  	case INV_MPU6500:
>>  	case INV_MPU6515:
>>  	case INV_MPU6880:
>> 
>
>