RE: [PATCH net-next v2] r8169: add support for RTL8125cp

[javen]

>On 2/2/2026 3:18 AM, javen wrote:
>> From: Javen Xu <javen_xu@xxxxxxxxxxxxxx>
>> 
>> This patch adds support for chip RTL8125cp. Its XID is 0x708. We apply
>> different and firmware for RTL8125cp.
>> 
>> Signed-off-by: Javen Xu <javen_xu@xxxxxxxxxxxxxx>
>> 
>> ---
>> v2: This patch fix one mistake on phy_modify_paged(phydev, 0xa43, 0x10,
>> 0x0000, 0x1001) which is phy_modify_paged(phydev, 0xa43, 0x00, 0x0000, 0x1001) on patch v1.
>> 
>0xa43/0x10 is PHYCR1 (at least on RTL8221). There bit 12 is "ALDPS XTAL-OFF", and valid only
>if bit 2 is set too. And bits 0 and 1 are marked as reserved, to be 0 always.
>What PHY is RTL8125cp using, and has register 0xa43/0x10 a different meaning there?

Register 0xa43/0x10 BIT(0) means 'link speed 10m PLL OFF', BIT(1) means 'ALDPS PLL OFF',
BIT(2) means 'ENABLE ALDPS', BIT(12) meas 'ALDPS XTAL OFF'. We recommend set BIT(0) and BIT(1),
clear BIT(12). So i will resubmit a new patch. 

Thanks,
Javen Xu