Re: [PATCH v4 1/3] mm: use targeted IPIs for TLB sync with lockless page table walkers

[Lance Yang]

On 2026/2/2 20:51, Peter Zijlstra wrote:
> On Mon, Feb 02, 2026 at 08:14:32PM +0800, Lance Yang wrote:
>
> > > > +	/* Pairs with smp_mb() in pt_walk_lockless_start(). */
> > >
> > > Pairs how? The start thing does something like:
> > >
> > > 	[W] active_lockless_pt_walk_mm = mm
> > > 	MB
> > > 	[L] page-tables
> > >
> > > So this is:
> > >
> > > 	[L] page-tables
> > > 	RMB
> > > 	[L] active_lockless_pt_walk_mm
> > >
> > > ?
> >
> > On the walker side (pt_walk_lockless_start):
> >
> >   [W]  active_lockless_pt_walk_mm = mm
> >   MB
> >   [L] page-tables (walker reads page tables)
> >
> > So the walker publishes "I'm walking this mm" before reading page tables.
> >
> > On the sync side we don't read page-tables. We do:
> >
> >   RMB
> >   [L] active_lockless_pt_walk_mm (we read the per-CPU pointer below)
> >
> > We need to observe the walker's store of active_lockless_pt_walk_mm before
> > we decide which CPUs to IPI.
> >
> > So on the sync side we do smp_rmb(), then read active_lockless_pt_walk_mm.
> >
> > That pairs with the full barrier in pt_walk_lockless_start().
>
> No it doesn't; this is not how memory barriers work.

Hmm... we need MB rather than RMB on the sync side. Is that correct?

Walker:
[W]active_lockless_pt_walk_mm = mm -> MB -> [L]page-tables

Sync:
[W]page-tables -> MB -> [L]active_lockless_pt_walk_mm


Thanks,
Lance