Re: [PATCH RESEND net v3 1/3] octeon_ep: disable per ring interrupts

[Jakub Kicinski]

On Fri, 30 Jan 2026 14:15:45 +0000 Vimlesh Kumar wrote:
> +	for (i = 0; i < num_rings; i++) {
> +		intr_mask |= (BIT_ULL(srn + i));

Please remove all the pointless brackets..

> +		reg_val = octep_read_csr64(oct,
> +					   CN93_SDP_R_IN_INT_LEVELS(srn + i));
> +		reg_val &= (~CN93_INT_ENA_BIT);

.. like this ..

> +		octep_write_csr64(oct,
> +				  CN93_SDP_R_IN_INT_LEVELS(srn + i), reg_val);
> +
> +		reg_val = octep_read_csr64(oct,
> +					   CN93_SDP_R_OUT_INT_LEVELS(srn + i));
> +		reg_val &= (~CN93_INT_ENA_BIT);
> +		octep_write_csr64(oct,
> +				  CN93_SDP_R_OUT_INT_LEVELS(srn + i), reg_val);

> diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_regs_cn9k_pf.h b/drivers/net/ethernet/marvell/octeon_ep/octep_regs_cn9k_pf.h
> index ca473502d7a0..42cb199bd085 100644
> --- a/drivers/net/ethernet/marvell/octeon_ep/octep_regs_cn9k_pf.h
> +++ b/drivers/net/ethernet/marvell/octeon_ep/octep_regs_cn9k_pf.h
> @@ -386,5 +386,6 @@
>  #define CN93_PEM_BAR4_INDEX            7
>  #define CN93_PEM_BAR4_INDEX_SIZE       0x400000ULL
>  #define CN93_PEM_BAR4_INDEX_OFFSET     (CN93_PEM_BAR4_INDEX * CN93_PEM_BAR4_INDEX_SIZE)
> +#define CN93_INT_ENA_BIT	(BIT_ULL(62))

.. and this.