Re: [PATCH v5 3/4] misc: fastrpc: Expand context ID mask for DSP polling mode support

[Dmitry Baryshkov]

On Thu, Jan 29, 2026 at 03:56:55PM +0530, Ekansh Gupta wrote:
> 
> 
> On 1/6/2026 8:23 AM, Dmitry Baryshkov wrote:
> > On Tue, Dec 30, 2025 at 11:58:30AM +0530, Ekansh Gupta wrote:
> >> Current FastRPC context uses a 12-bit mask:
> >>   [ID(8 bits)][PD type(4 bits)] = GENMASK(11, 4)
> > Is it Linux-only representation or is it also used by the DSP? Will it
> > work with MSM8916?
> Apologies for the delay in response, had to go back to check on older DSP software.
> 
> DSP will also use this but it handled properly across platforms. DSP get PD details from PD bits
> and mask it to use further for async call checks. Other than async call check, the context ID is
> majorly used for book-keeping on DSP side(no functional utility).
> 
> So, it should also work on MSM8916,

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>



> >
> >> This works for normal calls but fails for DSP polling mode.
> >> Polling mode expects a 16-bit layout:
> >>   [15:8] = context ID (8 bits)
> >>   [7:5]  = reserved
> >>   [4]    = async mode bit
> >>   [3:0]  = PD type (4 bits)
> >>
> >> If async bit (bit 4) is set, DSP disables polling. With current
> >> mask, odd IDs can set this bit, causing DSP to skip poll updates.
> >>
> >> Update FASTRPC_CTXID_MASK to GENMASK(15, 8) so IDs occupy upper
> >> byte and lower byte is left for DSP flags and PD type.
> >>
> >> Reserved bits remain unused. This change is compatible with
> >> polling mode and does not break non-polling behavior.
> >>
> >> Bit layout:
> >>   [15:8] = CCCCCCCC (context ID)
> >>   [7:5]  = xxx (reserved)
> >>   [4]    = A (async mode)
> >>   [3:0]  = PPPP (PD type)
> >>
> >> Signed-off-by: Ekansh Gupta <ekansh.gupta@xxxxxxxxxxxxxxxx>
> >> ---
> >>  drivers/misc/fastrpc.c | 2 +-
> >>  1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> 

-- 
With best wishes
Dmitry