Re: [PATCH v2 5/6] irqchip/renesas-rzv2h: Add CA55 software interrupt support

[Lad, Prabhakar]

Hi Biju,

On Wed, Feb 4, 2026 at 7:08 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
>
>
> Hi Prabhakar,
>
> > -----Original Message-----
> > From: Prabhakar <prabhakar.csengg@xxxxxxxxx>
> > Sent: 03 February 2026 23:18
> > Subject: [PATCH v2 5/6] irqchip/renesas-rzv2h: Add CA55 software interrupt support
> >
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > The Renesas RZ/V2H ICU provides a software interrupt register (ICU_SWINT) that allows software to
> > explicitly assert interrupts toward individual
> > CA55 cores. Writing BIT(n) to ICU_SWINT triggers the corresponding interrupt.
> >
> > Extend the RZ/V2H ICU IRQ domain to include CA55 software interrupts as part of the hierarchical IRQ
> > numbering, backed by the ICU_SWINT register.
> >
> > SW interrupts can now be triggered when GENERIC_IRQ_INJECTION is enabled.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > ---
> > v1->v2:
> > - Made CA55 SW interrupt as part of ICU IRQ domain.
> > - Implemented rzv2h_icu_irq_set_irqchip_state() to trigger SWINT.
> > - Updated commit message accordingly.
> > ---
> >  drivers/irqchip/irq-renesas-rzv2h.c | 89 ++++++++++++++++++++++++++++-
> >  1 file changed, 86 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-renesas-rzv2h.c b/drivers/irqchip/irq-renesas-rzv2h.c
> > index 6c7bbb04c6e4..a2ff7524889c 100644
> > --- a/drivers/irqchip/irq-renesas-rzv2h.c
> > +++ b/drivers/irqchip/irq-renesas-rzv2h.c
> > @@ -12,6 +12,7 @@
> >  #include <linux/bitfield.h>
> >  #include <linux/cleanup.h>
> >  #include <linux/err.h>
> > +#include <linux/interrupt.h>
> >  #include <linux/io.h>
> >  #include <linux/irqchip.h>
> >  #include <linux/irqchip/irq-renesas-rzv2h.h>
> > @@ -29,7 +30,10 @@
> >  #define ICU_TINT_START                               (ICU_IRQ_LAST + 1)
> >  #define ICU_TINT_COUNT                               32
> >  #define ICU_TINT_LAST                                (ICU_TINT_START + ICU_TINT_COUNT - 1)
> > -#define ICU_NUM_IRQ                          (ICU_TINT_LAST + 1)
> > +#define ICU_CA55_INT_START                      (ICU_TINT_LAST + 1)
>
> Maybe define this after defining GPT IRQ macros[1] for continuity, when
> CONFIG_GENERIC_IRQ_INJECTION is disabled ??
>
This cannot be done, as these macros need to match the DT binding [0].
They index the interrupt names defined in the DT, so their placement
must remain aligned with the binding.

[0] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml?h=next-20260203#n105

Cheers,
Prabhakar