Re: [PATCH net] dpll: zl3073x: Fix output pin phase adjustment sign

[Vadim Fedorenko]

On 05/02/2026 18:10, Ivan Vecera wrote:
> The output pin phase adjustment functions incorrectly negate the phase
> compensation value.
>
> Per the ZL3073x datasheet, the output phase compensation register is
> simply a signed two's complement integer where:
>   - Positive values move the phase later in time
>   - Negative values move the phase earlier in time
>
> No negation is required. The erroneous negation caused phase adjustments
> to be applied in the wrong direction.
>
> Note that input pin phase adjustment correctly uses negation because the
> hardware has an inverted convention for input references (positive moves
> phase earlier, negative moves phase later).

Is it common for DPLLs to act this way?

> Fixes: 6287262f761e ("dpll: zl3073x: Add support to adjust phase")
> Signed-off-by: Ivan Vecera <ivecera@xxxxxxxxxx>

Anyways, with datasheet info being correctly read, the change LGTM
Reviewed-by: Vadim Fedorenko <vadim.fedorenko@xxxxxxxxx>