Re: [PATCH 2/4] arm64: dts: qcom: agatti: add LPASS devices

[Srinivas Kandagatla]

On 2/9/26 3:28 PM, Dmitry Baryshkov wrote:
> On Mon, Feb 09, 2026 at 02:24:26PM +0000, Srinivas Kandagatla wrote:
>> From: Alexey Klimov <alexey.klimov@xxxxxxxxxx>
>>
>> The rxmacro, txmacro, vamacro, soundwire nodes, lpass clock
>> controllers are required to support audio playback and
>> audio capture on sm6115 and its derivatives.
>>
>> Signed-off-by: Alexey Klimov <alexey.klimov@xxxxxxxxxx>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxxxxxxxx>
>> ---
>>  arch/arm64/boot/dts/qcom/agatti.dtsi | 189 +++++++++++++++++++++++++++
>>  1 file changed, 189 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/agatti.dtsi b/arch/arm64/boot/dts/qcom/agatti.dtsi
>> index 76b93b7bd50f..79cd8bb8e02c 100644
>> --- a/arch/arm64/boot/dts/qcom/agatti.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/agatti.dtsi
>> @@ -758,6 +758,42 @@ data-pins {
>>  					drive-strength = <8>;
>>  				};
>>  			};
>> +
>> +			lpass_tx_swr_active: lpass-tx-swr-active-state {
>> +				clk-pins {
>> +					pins = "gpio0";
>> +					function = "swr_tx_clk";
>> +					drive-strength = <10>;
>> +					slew-rate = <3>;
>> +					bias-disable;
>> +				};
>> +
>> +				data-pins {
>> +					pins = "gpio1", "gpio2";
>> +					function = "swr_tx_data";
>> +					drive-strength = <10>;
>> +					slew-rate = <3>;
>> +					bias-bus-hold;
>> +				};
>> +			};
>> +
>> +			lpass_rx_swr_active: lpass-rx-swr-active-state {
>> +				clk-pins {
>> +					pins = "gpio3";
>> +					function = "swr_rx_clk";
>> +					drive-strength = <10>;
>> +					slew-rate = <3>;
>> +					bias-disable;
>> +				};
>> +
>> +				data-pins {
>> +					pins = "gpio4", "gpio5";
>> +					function = "swr_rx_data";
>> +					drive-strength = <10>;
>> +					slew-rate = <3>;
>> +					bias-bus-hold;
>> +				};
>> +			};
>>  		};
>>  
>>  		gcc: clock-controller@1400000 {
>> @@ -2188,6 +2224,159 @@ glink-edge {
>>  			};
>>  		};
>>  
>> +		rxmacro: codec@a600000 {
>> +			compatible = "qcom,sm6115-lpass-rx-macro";
>> +			reg = <0x0 0xa600000 0x0 0x1000>;
>> +
>> +			clocks = <&q6afecc LPASS_CLK_ID_RX_CORE_MCLK
>> +				LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> 
> Plesae correct the indentation (or just use single line for each entry).
Checkpatch was not happy with more than 100 chars, which is why I folded
this out, I will fix the indent in next spin.

--srini
> 
>> +				 <&q6afecc LPASS_CLK_ID_RX_CORE_NPL_MCLK
>> +				 LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
>> +				 <&q6afecc LPASS_HW_DCODEC_VOTE
>> +				 LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
>> +				 <&vamacro>;
> 
> The rest LGTM.
>