[PATCH 1/2] arm64: dts: socfpga: agilex5: Enable i3c0 and i3c1 on socdk
From: adrianhoyin . ng
Date: Wed Feb 11 2026 - 02:19:24 EST
From: Adrian Ng Ho Yin <adrianhoyin.ng@xxxxxxxxxx>
Enable support for i3c0 and i3c1 for Agilex5 socdk.
Add explicit aliases for both I3C controllers to ensure i3c0 and
i3c1 are always assigned to the correct physical controllers
regardless of probe order.
Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@xxxxxxxxxx>
---
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
index 262bb3e8e5c7..3076696d9fd7 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
@@ -13,6 +13,8 @@ aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
ethernet2 = &gmac2;
+ i3c0 = &i3c0;
+ i3c1 = &i3c1;
};
chosen {
@@ -61,6 +63,14 @@ &gpio1 {
status = "okay";
};
+&i3c0 {
+ status = "okay";
+};
+
+&i3c1 {
+ status = "okay";
+};
+
&osc1 {
clock-frequency = <25000000>;
};
--
2.49.GIT