[PATCH v2 4/9] arm64: dts: st: add RISAB1/2/3/4/5/6 nodes to stm32mp251.dtsi

From: Gatien Chevallier

Date: Thu Feb 12 2026 - 05:13:04 EST


Add RISAB1/2/3/4/5/6 nodes to the stm32mp251.dtsi device tree SoC
file.

Signed-off-by: Gatien Chevallier <gatien.chevallier@xxxxxxxxxxx>
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 48 ++++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index a8e6e0f77b83..b413430939a8 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -1733,6 +1733,54 @@ pcie@0,0 {
};
};

+ risab1: firewall@420f0000 {
+ compatible = "st,stm32mp25-risab";
+ reg = <0x420f0000 0x1000>;
+ clocks = <&scmi_clk CK_SCMI_ICN_LS_MCU>;
+ st,mem-map = <0xa000000 0x20000>;
+ status = "disabled";
+ };
+
+ risab2: firewall@42100000 {
+ compatible = "st,stm32mp25-risab";
+ reg = <0x42100000 0x1000>;
+ clocks = <&scmi_clk CK_SCMI_ICN_LS_MCU>;
+ st,mem-map = <0xa020000 0x20000>;
+ status = "disabled";
+ };
+
+ risab3: firewall@42110000 {
+ compatible = "st,stm32mp25-risab";
+ reg = <0x42110000 0x1000>;
+ clocks = <&scmi_clk CK_SCMI_ICN_LS_MCU>;
+ st,mem-map = <0xa040000 0x20000>;
+ status = "disabled";
+ };
+
+ risab4: firewall@42120000 {
+ compatible = "st,stm32mp25-risab";
+ reg = <0x42120000 0x1000>;
+ clocks = <&scmi_clk CK_SCMI_ICN_LS_MCU>;
+ st,mem-map = <0xa060000 0x20000>;
+ status = "disabled";
+ };
+
+ risab5: firewall@42130000 {
+ compatible = "st,stm32mp25-risab";
+ reg = <0x42130000 0x1000>;
+ clocks = <&scmi_clk CK_SCMI_ICN_LS_MCU>;
+ st,mem-map = <0xa080000 0x20000>;
+ status = "disabled";
+ };
+
+ risab6: firewall@42140000 {
+ compatible = "st,stm32mp25-risab";
+ reg = <0x42140000 0x1000>;
+ clocks = <&scmi_clk CK_SCMI_ICN_LS_MCU>;
+ st,mem-map = <0xa0a0000 0x20000>;
+ status = "disabled";
+ };
+
bsec: efuse@44000000 {
compatible = "st,stm32mp25-bsec";
reg = <0x44000000 0x1000>;

--
2.43.0