Re: [PATCH] clk: qcom: rpmh: Fix LNBBCLK3 divider for X1E80100

[Konrad Dybcio]

On 2/11/26 7:22 PM, Taniya Das wrote:
> The LNBBCLK3 clock used by the UFS controller runs at 38.4 MHz.
> Update the divider value to generate the correct output frequency.

Does this also apply to e.g. 8550 which seems to have a similar setup?

Konrad