Re: [RFC PATCH v2 09/12] spi: cadence-quadspi: add PHY tuning infrastructure

[Michael Walle]

Hi,

On Thu Feb 12, 2026 at 11:50 AM CET, Miquel Raynal wrote:
> On 09/02/2026 at 10:48:21 +01, "Michael Walle" <mwalle@xxxxxxxxxx> wrote:
>> On Tue Jan 13, 2026 at 3:16 PM CET, Santhosh Kumar K wrote:
>>> +static int cqspi_get_phy_pattern_offset(struct device *dev, u32 *offset)
>>
>> ..
>>
>>> +	partition_np = of_get_child_by_name(flash_np, "partitions");
>>> +	if (!partition_np) {
>>> +		of_node_put(flash_np);
>>> +		return -ENODEV;
>>> +	}
>>> +
>>> +	for_each_child_of_node(partition_np, part_np) {
>>> +		if (of_property_read_string(part_np, "label", &label) ||
>>> +		    !strstr(label, "phypattern"))
>>> +			continue;
>>
>> There was already a review comment on the last version. Moving this
>> into the driver doesn't make it any better. In fact this might
>> create a (bad) precedent for future drivers.
>
> I remember complaining about it but not if there was a solution
> foreseen. In SPI NAND the solution has been found: the pattern is in the
> driver and we load it into cache before PHY tuning. But for SPI NOR I
> understood this wasn't possible. What would be an alternative?

I'm not complaining about using a partition for the pattern but
about the hardcoded name of it.

It was proposed to use at least a device tree phandle to point to a
partition (or so).

-michael