Re: [PATCH v2] arm64: dts: qcom: sm8550: Add UART15

[Konrad Dybcio]

On 2/12/26 3:53 PM, Aaron Kling wrote:
> On Thu, Feb 12, 2026 at 4:49 AM Konrad Dybcio
> <konrad.dybcio@xxxxxxxxxxxxxxxx> wrote:
>>
>> On 2/11/26 11:35 PM, Aaron Kling via B4 Relay wrote:
>>> From: Xilin Wu <wuxilin123@xxxxxxxxx>
>>>
>>> Add uart15 node for UART bus present on sm8550 SoC.
>>>
>>> Signed-off-by: Molly Sophia <mollysophia379@xxxxxxxxx>
>>> Signed-off-by: Xilin Wu <wuxilin123@xxxxxxxxx>
>>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
>>> Signed-off-by: Aaron Kling <webgeek1234@xxxxxxxxx>
>>> ---
>>> This patch was originally submitted as part of a series to support the
>>> AYN Odin 2 [0]. That series stalled, so submitting separately.
>>>
>>> [0] https://lore.kernel.org/all/20240424-ayn-odin2-initial-v1-0-e0aa05c991fd@xxxxxxxxx/
>>> ---
>>> Changes in v2:
>>> - Use QCOM_ICC_TAG_ define in interconnect paths phandle third argument
>>> - Link to v1: https://lore.kernel.org/r/20260207-sm8550-uart15-v1-1-d8ccf746d102@xxxxxxxxx
>>> ---
>>>  arch/arm64/boot/dts/qcom/sm8550.dtsi | 24 ++++++++++++++++++++++++
>>>  1 file changed, 24 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
>>> index e3f93f4f412ded9583a6bc9215185a0daf5f1b57..a54f375f7f041a193a4396e4aa911abb42e3e6dc 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
>>> @@ -1251,6 +1251,22 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
>>>                               #size-cells = <0>;
>>>                               status = "disabled";
>>>                       };
>>> +
>>> +                     uart15: serial@89c000 {
>>
>> This should be uart23 (see other nodes at this base addr have that index)
> 
> Am I missing something here? For sm8550 [0], I see i2c@89c000 and
> spi@89c000 labelled as i2c15 and spi15 respectively.

Well, it seems like I implicitly upgraded your device in my brain.. what I
said is true for x elite..

Konrad