[PATCH 1/2] staging: most: dim2: check return value of clk_prepare_enable for PLL

From: Artem Lytkin

Date: Mon Feb 16 2026 - 15:19:42 EST


The return value of clk_prepare_enable() for the PLL clock is not
checked, while the same call for the MLB clock is properly checked
earlier in the function. If clk_prepare_enable() fails, the driver
continues without the PLL clock enabled, leading to undefined
hardware behavior.

Add the missing error check and disable the MLB clock on failure to
keep the cleanup consistent with the rest of the function.

Signed-off-by: Artem Lytkin <iprintercanon@xxxxxxxxx>
---
drivers/staging/most/dim2/dim2.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/staging/most/dim2/dim2.c b/drivers/staging/most/dim2/dim2.c
index dad2abe6c..1f07c37df 100644
--- a/drivers/staging/most/dim2/dim2.c
+++ b/drivers/staging/most/dim2/dim2.c
@@ -944,7 +944,12 @@ static int fsl_mx6_enable(struct platform_device *pdev)
}

writel(0x888, dev->io_base + 0x38);
- clk_prepare_enable(dev->clk_pll);
+ ret = clk_prepare_enable(dev->clk_pll);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to enable pll clock\n");
+ clk_disable_unprepare(dev->clk);
+ return ret;
+ }
}

return 0;
--
2.43.0