Re: [PATCH net] dpll: zl3073x: Fix ref frequency setting

[Simon Horman]

On Mon, Feb 16, 2026 at 08:40:07PM +0100, Ivan Vecera wrote:
> The frequency for an input reference is computed as:
> 
>   frequency = freq_base * freq_mult * freq_ratio_m / freq_ratio_n
> 
> Before commit 5bc02b190a3fb ("dpll: zl3073x: Cache all reference
> properties in zl3073x_ref"), zl3073x_dpll_input_pin_frequency_set()
> explicitly wrote 1 to both the REF_RATIO_M and REF_RATIO_N hardware
> registers whenever a new frequency was set. This ensured the FEC ratio
> was always reset to 1:1 alongside the new base/multiplier values.
> 
> The refactoring in that commit introduced zl3073x_ref_freq_set() to
> update the cached ref state, but this helper only sets freq_base and
> freq_mult without resetting freq_ratio_m and freq_ratio_n to 1. Because
> zl3073x_ref_state_set() uses a compare-and-write strategy, unchanged
> ratio fields are never written to the hardware. If the device previously
> had non-unity FEC ratio values, they remain in effect after a frequency
> change, resulting in an incorrect computed frequency.
> 
> Explicitly set freq_ratio_m and freq_ratio_n to 1 in zl3073x_ref_freq_set()
> to restore the original behavior.
> 
> Fixes: 5bc02b190a3fb ("dpll: zl3073x: Cache all reference properties in zl3073x_ref")
> Signed-off-by: Ivan Vecera <ivecera@xxxxxxxxxx>

Reviewed-by: Simon Horman <horms@xxxxxxxxxx>