Re: [PATCH v4 1/3] dt-bindings: mmc: sdhci-msm: Add ICE phandle

[Krzysztof Kozlowski]

On Tue, Feb 17, 2026 at 10:55:24AM +0530, Neeraj Soni wrote:
> Starting with sc7280(kodiak), the ICE will have its own device-tree node.
> So add the qcom,ice property to reference it.
> 
> To avoid double-modeling, when qcom,ice is present, disallow an embedded ICE

Please wrap commit message according to Linux coding style / submission
process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597

> register region in the SDHCI node. Older SoCs without ICE remain valid as
> no additional requirement is imposed.
> 
> Co-developed-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> Co-developed-by: Abhinaba Rakshit <abhinaba.rakshit@xxxxxxxxxxxxxxxx>
> Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@xxxxxxxxxxxxxxxx>
> Signed-off-by: Neeraj Soni <neeraj.soni@xxxxxxxxxxxxxxxx>
> 
> ---
> 
> Some initial work is done by Abel here:
> https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@xxxxxxxxxx/
> and by Abhinaba here:
> https://lore.kernel.org/all/20251009-add-separate-ice-ufs-and-emmc-device-nodes-for-qcs615-platform-v1-1-2a34d8d03c72@xxxxxxxxxxxxxxxx/
> 
> This patch adds the purpose and usage for phandle in the description and encodes
> it properly in the schema.
> ---
>  .../devicetree/bindings/mmc/sdhci-msm.yaml        | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> index 938be8228d66..9b902e0c8d09 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> @@ -140,6 +140,11 @@ properties:
>      $ref: /schemas/types.yaml#/definitions/uint32
>      description: platform specific settings for DLL_CONFIG reg.
>  
> +  qcom,ice:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      phandle to the Inline Crypto Engine (ICE) hardware block for this controller.


Srsly, I asked once and not much improved. What is explicitly written in
coding style which I asked you twice to read?

And how long is this line? Why such trivialities cannot be fixed and I
need to remind this every time?

> +
>    iommus:
>      minItems: 1
>      maxItems: 8
> @@ -223,6 +228,16 @@ allOf:
>              - const: cqhci
>              - const: ice
>  
> +  - if:
> +      required:
> +        - qcom,ice
> +    then:
> +      properties:
> +        reg-names:
> +          not:
> +            contains:
> +              const: ice

And reg is still 4? This is not correct syntax. You need to define
proper and final constraints per each device. I would write example, but
why... more things you could just ignore.

Best regards,
Krzysztof