Re: [PATCH 0/2] dmaengine: dw-edma: Interrupt-emulation doorbell support

[Koichiro Den]

On Mon, Feb 16, 2026 at 12:22:14AM +0900, Koichiro Den wrote:
> Hi,
> 
> Some DesignWare eDMA instances support "interrupt emulation", where a
> software write can assert the IRQ line without setting the normal
> DONE/ABORT status bits.
> 
> In the current mainline, on implementations that support interrupt
> emulation, writing once to DMA_{WRITE,READ}_INT_STATUS_OFF is sufficient
> to leave the level-triggered IRQ line asserted. Since the shared dw-edma
> IRQ handlers only look at DONE/ABORT bits and do not perform any
> deassertion sequence for interrupt emulation, the IRQ remains asserted
> and is eventually disabled by the generic IRQ layer:
> 
>   $ sudo devmem2 0xe65d50a0 w 0
> 
>   [   47.189557] irq 48: nobody cared (try booting with the "irqpoll" option)
>   ...
>   [   47.190383] handlers:
>   [   47.199837] [<00000000a5ecb36e>] dw_edma_interrupt_common
>   [   47.200214] Disabling IRQ #48
> 
> In other words, a single interrupt-emulation write can leave the IRQ
> line stuck asserted and render the DMA engine unusable until reboot.
> 
> This series fixes the problem by:
> 
>   - adding a core hook to deassert an emulated interrupt
>   - wiring a requestable Linux virtual IRQ whose .irq_ack performs the
>     deassert sequence
>   - raising that virtual IRQ from the dw-edma IRQ path to ensure the
>     deassert sequence is always executed
> 
> This makes interrupt emulation safe and also enables platform users to
> expose it as a doorbell via the exported db_irq and db_offset.
> 
> This is a spin-off from:
> https://lore.kernel.org/linux-pci/20260209125316.2132589-1-den@xxxxxxxxxxxxx/
> 
> Based on dmaengine.git next branch latest:
> Commit ab736ed52e34 ("dmaengine: add Frank Li as reviewer")
> 
> Thanks for reviewing,
> 
> 
> Koichiro Den (2):
>   dmaengine: dw-edma: Add interrupt-emulation hooks
>   dmaengine: dw-edma: Add virtual IRQ for interrupt-emulation doorbells
> 
>  drivers/dma/dw-edma/dw-edma-core.c    | 127 +++++++++++++++++++++++++-
>  drivers/dma/dw-edma/dw-edma-core.h    |  17 ++++
>  drivers/dma/dw-edma/dw-edma-v0-core.c |  21 +++++
>  drivers/dma/dw-edma/dw-hdma-v0-core.c |   7 ++
>  include/linux/dma/edma.h              |   6 ++
>  5 files changed, 173 insertions(+), 5 deletions(-)

+CC: Niklas

Niklas provided valuable feedback in the previous iterations and also helped
test the earlier (non-split) series mentioned above. During testing, he
identified that on platforms where chip->nr_irqs > 1, the interrupt emulation
IRQ could be randomly delivered to one of the shared channel IRQs [1]. That
observation was the main motivation for the rework.

I missed Niklas in CC earlier, sorry about that. I had naively relied on
get_maintainers.pl. I'll be more careful.

In this series, the implementation has been reworked around a dedicated
dw_edma_emul_irqchip combined with handle_level_irq(), and generic_handle_irq()
is now invoked unconditionally from the channel IRQ handlers to ensure the
deassert sequence is always executed.

[1] the discussion started at https://lore.kernel.org/linux-pci/aYsjfTtA0EsXwh69@ryzen/

Best regards,
Koichiro

> 
> -- 
> 2.51.0
>