Re: [RFC PATCH v2 09/12] spi: cadence-quadspi: add PHY tuning infrastructure

[Santhosh Kumar K]

Hello Michael and Miquel,

On 12/02/26 18:25, Miquel Raynal wrote:
> Hello,
>
> > > > > +	for_each_child_of_node(partition_np, part_np) {
> > > > > +		if (of_property_read_string(part_np, "label", &label) ||
> > > > > +		    !strstr(label, "phypattern"))
> > > > > +			continue;
> > > >
> > > > There was already a review comment on the last version. Moving this
> > > > into the driver doesn't make it any better. In fact this might
> > > > create a (bad) precedent for future drivers.
> > >
> > > I remember complaining about it but not if there was a solution
> > > foreseen. In SPI NAND the solution has been found: the pattern is in the
> > > driver and we load it into cache before PHY tuning. But for SPI NOR I
> > > understood this wasn't possible. What would be an alternative?
> >
> > I'm not complaining about using a partition for the pattern but
> > about the hardcoded name of it.
> >
> > It was proposed to use at least a device tree phandle to point to a
> > partition (or so).
>
> Ah, yes indeed, thanks for clarifying this up (again) for me. I also
> agree the hardcoded name is not ideal.

I remember this was discussed in the previous version. As mentioned
in v1, using a phandle may not be ideal since a single controller can
be associated with multiple flashes. Regarding the suggestion to
maintain an array of phandles - consider a configuration with three
flashes (NAND, NOR, and another NAND). In such a case, we would not
need a phandle for the NAND devices, right?

Also, I'm trying to understand the practical difference between using
the partition name versus a phandle. Since the phandle would still be
named something like "phy_partition", it seems functionally similar.
Please let me know if I'm missing something here.

Regards,
Santhosh.

> Thanks,
> Miquèl