[PATCH AUTOSEL 6.19-6.12] mfd: intel-lpss: Add Intel Nova Lake-S PCI IDs

From: Sasha Levin

Date: Wed Feb 18 2026 - 21:14:21 EST


From: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx>

[ Upstream commit cefd793fa17de708d043adab50e7f96f414b0f1d ]

Add Intel Nova Lake-S LPSS PCI IDs.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx>
Acked-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
Link: https://patch.msgid.link/20260113172151.48062-1-ilpo.jarvinen@xxxxxxxxxxxxxxx
Signed-off-by: Lee Jones <lee@xxxxxxxxxx>
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
---

LLM Generated explanations, may be completely bogus:

All three info structures (`bxt_uart_info`, `tgl_spi_info`,
`ehl_i2c_info`) are well-established and used extensively throughout the
driver for many other Intel platforms. The new NVL-S entries simply map
new PCI device IDs to these existing, proven structures.

### Classification

This is a **new device ID addition** — one of the explicit exceptions to
the "no new features" stable rule. It falls squarely under the "NEW
DEVICE IDs" category:
- The driver (`intel-lpss-pci`) already exists in all stable trees
- Only PCI IDs are being added — no new code, no new info structures, no
new logic
- The device info structures referenced are already present and well-
tested

### Scope and Risk Assessment

- **Lines changed**: 12 lines added, 0 lines modified, 0 lines deleted
- **Files touched**: 1 (`drivers/mfd/intel-lpss-pci.c`)
- **Risk**: Essentially zero. Adding entries to a PCI ID table cannot
break existing functionality. The new entries only activate for
hardware with matching PCI IDs (Nova Lake-S), and they reuse existing
well-tested device info structures.
- **No dependencies**: This is fully self-contained.

### User Impact

Users with Intel Nova Lake-S hardware need these IDs for LPSS (Low Power
Subsystem) peripherals to work — I2C, SPI, and UART controllers. Without
these IDs, the LPSS driver won't bind to the devices, meaning I2C, SPI,
and UART peripherals on Nova Lake-S systems won't function.

### Verification

- Verified that `bxt_uart_info`, `tgl_spi_info`, and `ehl_i2c_info` are
all defined in the same file (lines 156, 243, 229 respectively) —
confirmed via Grep.
- Verified the change is purely additive (12 new PCI_VDEVICE entries)
with no modifications to existing entries or logic — confirmed from
the diff.
- Verified the pattern matches dozens of other platform ID additions in
the same file (APL, RPL-S, ARL-H, TGL, ADL, etc.) — confirmed via Grep
showing extensive use of these same info structures.
- The commit is authored by Ilpo Järvinen (Intel) and acked by Andy
Shevchenko (Intel), both established kernel contributors — confirmed
from commit metadata.

### Conclusion

This is a textbook example of a new device ID addition that should be
backported to stable. It:
- Uses existing, proven driver infrastructure
- Is trivially correct (PCI ID table entries)
- Has zero risk of regression to existing users
- Enables hardware support for Nova Lake-S platform users
- Is small, self-contained, and has no dependencies

**YES**

drivers/mfd/intel-lpss-pci.c | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
index 8d92c895d3aef..713a5bfb1a3c2 100644
--- a/drivers/mfd/intel-lpss-pci.c
+++ b/drivers/mfd/intel-lpss-pci.c
@@ -437,6 +437,19 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
{ PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_spi_info },
{ PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_spi_info },
{ PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info },
+ /* NVL-S */
+ { PCI_VDEVICE(INTEL, 0x6e28), (kernel_ulong_t)&bxt_uart_info },
+ { PCI_VDEVICE(INTEL, 0x6e29), (kernel_ulong_t)&bxt_uart_info },
+ { PCI_VDEVICE(INTEL, 0x6e2a), (kernel_ulong_t)&tgl_spi_info },
+ { PCI_VDEVICE(INTEL, 0x6e2b), (kernel_ulong_t)&tgl_spi_info },
+ { PCI_VDEVICE(INTEL, 0x6e4c), (kernel_ulong_t)&ehl_i2c_info },
+ { PCI_VDEVICE(INTEL, 0x6e4d), (kernel_ulong_t)&ehl_i2c_info },
+ { PCI_VDEVICE(INTEL, 0x6e4e), (kernel_ulong_t)&ehl_i2c_info },
+ { PCI_VDEVICE(INTEL, 0x6e4f), (kernel_ulong_t)&ehl_i2c_info },
+ { PCI_VDEVICE(INTEL, 0x6e5c), (kernel_ulong_t)&bxt_uart_info },
+ { PCI_VDEVICE(INTEL, 0x6e5e), (kernel_ulong_t)&tgl_spi_info },
+ { PCI_VDEVICE(INTEL, 0x6e7a), (kernel_ulong_t)&ehl_i2c_info },
+ { PCI_VDEVICE(INTEL, 0x6e7b), (kernel_ulong_t)&ehl_i2c_info },
/* ARL-H */
{ PCI_VDEVICE(INTEL, 0x7725), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7726), (kernel_ulong_t)&bxt_uart_info },
--
2.51.0