Re: [PATCH v3 0/2] irqchip/sifive-plic: Fix wrong nr_irqs handling

[patchwork-bot+linux-riscv]

Hello:

This series was applied to riscv/linux.git (fixes)
by Thomas Gleixner <tglx@xxxxxxxxxx>:

On Wed,  4 Feb 2026 01:17:07 +0800 you wrote:
> This patch series fixes long standing bugs in sifive-plic driver regarding
> the handling of nr_irqs. Some code assumes the first irq source is 0 while
> some assumes it is 1. Since the first irq source is actually 1, this causes
> various issues including memory corruption when the number of irqs is
> multiple of 32. Also, some code assumes nr_irqs is the maximum irq source
> ID while some assumes it is the total number of irq sources including the
> reserved source 0. This patch series standardizes the handling of nr_irqs
> to be the maximum irq source ID, and the first irq source is 1.
> 
> [...]

Here is the summary with links:
  - [v3,1/2] irqchip/sifive-plic: Fix wrong nr_irqs handling
    (no matching commit)
  - [v3,2/2] dt-binding: riscv: Clarify the riscv,ndev meaning in PLIC
    https://git.kernel.org/riscv/c/889588d75050

You are awesome, thank you!
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