[PATCH v3 1/3] dt-bindings: clock: qcom: Add SM8750 GPU clocks
From: Taniya Das
Date: Fri Feb 20 2026 - 00:54:41 EST
From: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
The SM8750 features a "traditional" GPU_CC block, much of which is
controlled through the GMU microcontroller. Additionally, there's
an separate GX_CC block, where the GX GDSC is moved.
Update the bindings to accommodate for SM8750 SoC.
Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
Signed-off-by: Taniya Das <taniya.das@xxxxxxxxxxxxxxxx>
---
.../bindings/clock/qcom,kaanapali-gxclkctl.yaml | 1 +
.../bindings/clock/qcom,sm8450-gpucc.yaml | 2 +
include/dt-bindings/clock/qcom,sm8750-gpucc.h | 50 ++++++++++++++++++++++
3 files changed, 53 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml b/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml
index 5490a975f3db7d253a17cc13a67f6c44e0d47ef3..1876f23c174e4ede590847d80222e49b4200d8ba 100644
--- a/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml
@@ -21,6 +21,7 @@ properties:
compatible:
enum:
- qcom,kaanapali-gxclkctl
+ - qcom,sm8750-gxclkctl
power-domains:
description:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
index 6feaa32569f9a852c2049fee00ee7a2e2aefb558..3504db982cfa71fc03e187c3dac148d5f1cfb6ec 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml
@@ -22,6 +22,7 @@ description: |
include/dt-bindings/clock/qcom,sm8550-gpucc.h
include/dt-bindings/reset/qcom,sm8450-gpucc.h
include/dt-bindings/reset/qcom,sm8650-gpucc.h
+ include/dt-bindings/reset/qcom,sm8750-gpucc.h
include/dt-bindings/reset/qcom,x1e80100-gpucc.h
properties:
@@ -35,6 +36,7 @@ properties:
- qcom,sm8475-gpucc
- qcom,sm8550-gpucc
- qcom,sm8650-gpucc
+ - qcom,sm8750-gpucc
- qcom,x1e80100-gpucc
- qcom,x1p42100-gpucc
diff --git a/include/dt-bindings/clock/qcom,sm8750-gpucc.h b/include/dt-bindings/clock/qcom,sm8750-gpucc.h
new file mode 100644
index 0000000000000000000000000000000000000000..e2143d905fece19f4ef5cf413724f1597daa85ba
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm8750-gpucc.h
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8750_H
+#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8750_H
+
+/* GPU_CC clocks */
+#define GPU_CC_AHB_CLK 0
+#define GPU_CC_CB_CLK 1
+#define GPU_CC_CX_ACCU_SHIFT_CLK 2
+#define GPU_CC_CX_FF_CLK 3
+#define GPU_CC_CX_GMU_CLK 4
+#define GPU_CC_CXO_AON_CLK 5
+#define GPU_CC_CXO_CLK 6
+#define GPU_CC_DEMET_CLK 7
+#define GPU_CC_DPM_CLK 8
+#define GPU_CC_FF_CLK_SRC 9
+#define GPU_CC_FREQ_MEASURE_CLK 10
+#define GPU_CC_GMU_CLK_SRC 11
+#define GPU_CC_GX_ACCU_SHIFT_CLK 12
+#define GPU_CC_GX_ACD_AHB_FF_CLK 13
+#define GPU_CC_GX_AHB_FF_CLK 14
+#define GPU_CC_GX_GMU_CLK 15
+#define GPU_CC_GX_RCG_AHB_FF_CLK 16
+#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 17
+#define GPU_CC_HUB_AON_CLK 18
+#define GPU_CC_HUB_CLK_SRC 19
+#define GPU_CC_HUB_CX_INT_CLK 20
+#define GPU_CC_HUB_DIV_CLK_SRC 21
+#define GPU_CC_MEMNOC_GFX_CLK 22
+#define GPU_CC_PLL0 23
+#define GPU_CC_PLL0_OUT_EVEN 24
+#define GPU_CC_RSCC_HUB_AON_CLK 25
+#define GPU_CC_RSCC_XO_AON_CLK 26
+#define GPU_CC_SLEEP_CLK 27
+
+/* GPU_CC power domains */
+#define GPU_CC_CX_GDSC 0
+
+/* GPU_CC resets */
+#define GPU_CC_GPU_CC_CB_BCR 0
+#define GPU_CC_GPU_CC_CX_BCR 1
+#define GPU_CC_GPU_CC_FAST_HUB_BCR 2
+#define GPU_CC_GPU_CC_FF_BCR 3
+#define GPU_CC_GPU_CC_GMU_BCR 4
+#define GPU_CC_GPU_CC_GX_BCR 5
+#define GPU_CC_GPU_CC_XO_BCR 6
+
+#endif
--
2.34.1