RE: [PATCH 3/8] coresight: cti: Access ASICCTL only when implemented
From: Mike Leach
Date: Fri Feb 20 2026 - 03:22:14 EST
> -----Original Message-----
> From: Leo Yan <leo.yan@xxxxxxx>
> Sent: Monday, February 9, 2026 6:01 PM
> To: Suzuki Poulose <Suzuki.Poulose@xxxxxxx>; Mike Leach
> <Mike.Leach@xxxxxxx>; James Clark <james.clark@xxxxxxxxxx>; Alexander
> Shishkin <alexander.shishkin@xxxxxxxxxxxxxxx>; Greg Kroah-Hartman
> <gregkh@xxxxxxxxxxxxxxxxxxx>; Mathieu Poirier
> <mathieu.poirier@xxxxxxxxxx>; Tingwei Zhang <quic_tingwei@xxxxxxxxxxx>;
> Yingchao Deng <yingchao.deng@xxxxxxxxxxxxxxxx>; Jie Gan
> <jie.gan@xxxxxxxxxxxxxxxx>
> Cc: coresight@xxxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; Leo Yan <Leo.Yan@xxxxxxx>
> Subject: [PATCH 3/8] coresight: cti: Access ASICCTL only when implemented
>
> According to the Arm ARM (DDI 0487 L.b), ASICCTL is implemented only
> when CTIDEVID.EXTMUXNUM is non-zero.
>
> Based on CTIDEVID.EXTMUXNUM, add a flag 'asicctl_impl' to indicate
> whether the register is implemented, and access ASICCTL conditionally
> based on the flag.
>
> Allow the sysfs node to be visible only when the register is
> implemented.
>
> Signed-off-by: Leo Yan <leo.yan@xxxxxxx>
> ---
> drivers/hwtracing/coresight/coresight-cti-core.c | 5 ++++-
> drivers/hwtracing/coresight/coresight-cti-sysfs.c | 13 +++++++++++++
> drivers/hwtracing/coresight/coresight-cti.h | 2 ++
> 3 files changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c
> b/drivers/hwtracing/coresight/coresight-cti-core.c
> index
> 2d8b1cbe5bf5c9ce0383dc90335f0085b22a7f61..1950e9b757ae4879a267
> 1ddaf5675c54aa7956d5 100644
> --- a/drivers/hwtracing/coresight/coresight-cti-core.c
> +++ b/drivers/hwtracing/coresight/coresight-cti-core.c
> @@ -77,7 +77,8 @@ void cti_write_all_hw_regs(struct cti_drvdata *drvdata)
>
> /* other regs */
> writel_relaxed(config->ctigate, drvdata->base + CTIGATE);
> - writel_relaxed(config->asicctl, drvdata->base + ASICCTL);
> + if (config->asicctl_impl)
> + writel_relaxed(config->asicctl, drvdata->base + ASICCTL);
> writel_relaxed(config->ctiappset, drvdata->base + CTIAPPSET);
>
> /* re-enable CTI */
> @@ -230,6 +231,8 @@ static void cti_set_default_config(struct device *dev,
> config->trig_filter_enable = true;
> config->ctigate = GENMASK(config->nr_ctm_channels - 1, 0);
> config->enable_req_count = 0;
> +
> + config->asicctl_impl = !!FIELD_GET(GENMASK(4, 0), devid);
> }
>
> /*
> diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> b/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> index
> 9a997b2f090472761e9734fffc534663df8b06c6..c15a580f6e90f57b1376e0
> b883a27700966feb1a 100644
> --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> @@ -537,6 +537,18 @@ static struct attribute *coresight_cti_regs_attrs[] = {
> NULL,
> };
>
> +static umode_t coresight_cti_regs_is_visible(struct kobject *kobj,
> + struct attribute *attr, int idx)
> +{
> + struct device *dev = kobj_to_dev(kobj);
> + struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
> +
> + if (attr == &dev_attr_asicctl.attr && !drvdata->config.asicctl_impl)
> + return 0;
> +
> + return attr->mode;
> +}
> +
> /* CTI channel x-trigger programming */
> static int
> cti_trig_op_parse(struct device *dev, enum cti_chan_op op,
> @@ -1174,6 +1186,7 @@ static const struct attribute_group
> coresight_cti_mgmt_group = {
>
> static const struct attribute_group coresight_cti_regs_group = {
> .attrs = coresight_cti_regs_attrs,
> + .is_visible = coresight_cti_regs_is_visible,
> .name = "regs",
> };
>
> diff --git a/drivers/hwtracing/coresight/coresight-cti.h
> b/drivers/hwtracing/coresight/coresight-cti.h
> index
> 64f7324f098e8b5f90c6554e3872e3bf01988717..7a3e7f806dcb093e504f1
> aacb3b29564bea28f6c 100644
> --- a/drivers/hwtracing/coresight/coresight-cti.h
> +++ b/drivers/hwtracing/coresight/coresight-cti.h
> @@ -119,6 +119,7 @@ struct cti_device {
> * @nr_trig_max: Max number of trigger signals implemented on device.
> * (max of trig_in or trig_out) - from ID register.
> * @nr_ctm_channels: number of available CTM channels - from ID register.
> + * @asicctl_impl: true if asicctl is implemented.
> * @enable_req_count: CTI is enabled alongside >=1 associated devices.
> * @hw_enabled: true if hw is currently enabled.
> * @hw_powered: true if associated cpu powered on, or no cpu.
> @@ -140,6 +141,7 @@ struct cti_config {
> /* hardware description */
> int nr_ctm_channels;
> int nr_trig_max;
> + bool asicctl_impl;
>
> /* cti enable control */
> int enable_req_count;
>
> --
> 2.34.1
Reviewed-by: Mike Leach <mike.leach@xxxxxxx>