Re: [PATCH v3 1/2] arm64: dts: qcom: monaco: add lt8713sx bridge with displayport
From: Vishnu Saini
Date: Sat Feb 21 2026 - 18:27:13 EST
On Sun, Dec 28, 2025 at 05:49:30PM +0200, Dmitry Baryshkov wrote:
> On Sun, Dec 28, 2025 at 07:10:38PM +0530, Vishnu Saini wrote:
> > Monaco-evk has LT8713sx which act as DP to 3 DP output
> > converter. Edp PHY from monaco soc is connected to lt8713sx
> > as input and output of lt8713sx is connected to 3 mini DP ports.
> >
> > Two ports are available in mainboard and one port
> > is available on Mezz board.
> >
> > lt8713sx is connected to soc over i2c0 and with reset gpio
> > connected to pin6 of ioexpander5.
> >
> > Enable the edp nodes from monaco and enable lontium lt8713sx
> > bridge node.
> >
> > Co-developed-by: Prahlad Valluru <vvalluru@xxxxxxxxxxxxxxxx>
> > Signed-off-by: Prahlad Valluru <vvalluru@xxxxxxxxxxxxxxxx>
> > Signed-off-by: Vishnu Saini <vishnu.saini@xxxxxxxxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/monaco-evk.dts | 89 +++++++++++++++++++++++++++++++++
> > arch/arm64/boot/dts/qcom/monaco.dtsi | 6 +++
> > 2 files changed, 95 insertions(+)
> >
>
> > @@ -396,10 +456,39 @@ expander6: gpio@3e {
> > };
> > };
> >
> > +&mdss {
> > + status = "okay";
> > +};
> > +
> > +&mdss_dp0 {
> > + pinctrl-0 = <&dp_hot_plug_det>;
> > + pinctrl-names = "default";
>
> Is there a single HPD? How does it work? What happens if either of
> connected displays sends a HPD pulse signal?
Yes, from the SoC’s point of view there is a single HPD.
LT8713SX aggregates multiple downstream HPDs from connected displays into one upstream HPD to soc.
When any display is connected, the bridge firmware notices that one downstream port changed state and
It aggregates a single HPD to soc. The SoC treats this as a DP interrupt and AUX transactions start.
> > +
> > + status = "okay";
> > +};
> > +
> > +&mdss_dp0_out {
> > + data-lanes = <0 1 2 3>;
> > + link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
> > + remote-endpoint = <<8713sx_dp_in>;
>
> Does the bridge use DP signalling or does it use USB-C signalling here?
> And even if it is DP signalling, it should be correctly described as
> it uses signals coming from the QMP PHY. See how it's done for laptops
> with DP-HDMI convertors.
Yes, the LT8713SX is using native DP signalling, not USB‑C DP Alt‑Mode.
The QMP DP PHY is already implicitly part of the mdss_dp0 pipeline,
similar to other Qualcomm platforms where external DP bridges are connected. Because of that, I intentionally modeled the connection as:
MDSS DP controller -> LT8713SX bridge
This keeps the DT consistent with existing Qualcomm DP bridge descriptions, where the PHY is not represented as a separate graph endpoint unless there is external lane muxing or alternative signalling paths.
If you feel strongly that the DT should explicitly model:
MDSS DP controller -> QMP DP PHY → LT8713SX bridge
I can update the graph accordingly. Otherwise, please let me know if documenting this more clearly in the binding or commit message would be sufficient.
> > +};
> > +
> > +&mdss_dp0_phy {
> > + vdda-phy-supply = <&vreg_l5a>;
> > + vdda-pll-supply = <&vreg_l4a>;
> > +
> > + status = "okay";
> > +};
> > +
> > &iris {
> > status = "okay";
> > };
> >
> > +&qup_i2c0_data_clk {
> > + drive-strength = <2>;
> > + bias-pull-up;
> > +};
> > +
> > &qupv3_id_0 {
> > firmware-name = "qcom/qcs8300/qupv3fw.elf";
> > status = "okay";
> > diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
> > index e44fd5c33816..7f6c681fb1b4 100644
> > --- a/arch/arm64/boot/dts/qcom/monaco.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
> > @@ -5117,6 +5117,12 @@ tlmm: pinctrl@f100000 {
> > #interrupt-cells = <2>;
> > wakeup-parent = <&pdc>;
> >
> > + dp_hot_plug_det: dp-hot-plug-det-state {
> > + pins = "gpio94";
> > + function = "edp0_hot";
> > + bias-disable;
> > + };
> > +
> > hs0_mi2s_active: hs0-mi2s-active-state {
> > pins = "gpio106", "gpio107", "gpio108", "gpio109";
> > function = "hs0_mi2s";
> >
> > --
> > 2.34.1
> >
>
> --
> With best wishes
> Dmitry