Re: [LSF/MM/BPF TOPIC] 64k (or 16k) base page size on x86

From: Kiryl Shutsemau

Date: Mon Feb 23 2026 - 06:14:09 EST


On Mon, Feb 23, 2026 at 12:04:10PM +0100, David Hildenbrand (Arm) wrote:
> On 2/20/26 20:33, Kalesh Singh wrote:
> > On Fri, Feb 20, 2026 at 8:30 AM David Hildenbrand (Arm)
> > <david@xxxxxxxxxx> wrote:
> > >
> > > On 2/20/26 13:07, Kiryl Shutsemau wrote:
> > > >
> > > > Well, it will drastically limit the adoption. We have too much legacy
> > > > stuff on x86.
> > >
> > > I'd assume that many applications nowadays can deal with differing page
> > > sizes (thanks to some other architectures paving the way).
> > >
> > > But yes, some real legacy stuff, or stuff that ever only cared about
> > > intel still hardcodes pagesize=4k.
> >
> > I think most issues will stem from linkers setting the default ELF
> > segment alignment (max-page-size) for x86 to 4096. So those ELFs will
> > not load correctly or at all on the larger emulated granularity.
>
> Right, I assume that they will have to be thought about that, and possibly,
> some binaries/libraries recompiled.

I think backward compatibility is important and I believe we can get
there without ABI break. And optimize from there.

BTW, x86-64 SysV ABI allows for 64k page size:

Systems are permitted to use any power-of-two page size between
4KB and 64KB, inclusive.

But it doesn't work in practice.

--
Kiryl Shutsemau / Kirill A. Shutemov