Re: [PATCH] arm64: dts: rockchip: Fix vdec register blocks order on RK3576
From: Diederik de Haas
Date: Mon Feb 23 2026 - 09:40:30 EST
On Mon Feb 23, 2026 at 3:31 PM CET, Sebastian Reichel wrote:
> On Mon, Feb 23, 2026 at 02:25:05PM +0200, Cristian Ciocaltea wrote:
>> When building device trees for the RK3576 based boards, DTC shows the
>> following complaint:
>>
>> rk3576.dtsi:1282.30-1304.5: Warning (simple_bus_reg): /soc/video-codec@27b00000: simple-bus unit address format error, expected "27b00100"
>>
>> Provide the register blocks in the expected address-based order.
>>
>> Fixes: da0de806d8b4 ("arm64: dts: rockchip: Add the vdpu383 Video Decoder on rk3576")
>> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@xxxxxxxxxxxxx>
>> ---
>
> This fixes this warning, but instead creates a new one, because the
> reg-names order is fixed in the DT binding:
>
> reg:
> minItems: 1
> items:
> - description: The function configuration registers base
> - description: The link table configuration registers base
> - description: The cache configuration registers base
>
> reg-names:
> items:
> - const: function
> - const: link
> - const: cache
See also the prior discussion wrt this:
https://lore.kernel.org/linux-rockchip/edabca63-594e-44ae-8a3d-0f60987a8664@xxxxxxxxxxxxx/
>
> Greetings,
>
> -- Sebastian
>
>> arch/arm64/boot/dts/rockchip/rk3576.dtsi | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> index 49ccdf12ef7e..45eb0d053a6f 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
>> @@ -1281,10 +1281,10 @@ gpu: gpu@27800000 {
>>
>> vdec: video-codec@27b00000 {
>> compatible = "rockchip,rk3576-vdec";
>> - reg = <0x0 0x27b00100 0x0 0x500>,
>> - <0x0 0x27b00000 0x0 0x100>,
>> + reg = <0x0 0x27b00000 0x0 0x100>,
>> + <0x0 0x27b00100 0x0 0x500>,
>> <0x0 0x27b00600 0x0 0x100>;
>> - reg-names = "function", "link", "cache";
>> + reg-names = "link", "function", "cache";
>> interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
>> clocks = <&cru ACLK_RKVDEC_ROOT>, <&cru HCLK_RKVDEC>,
>> <&cru ACLK_RKVDEC_ROOT_BAK>, <&cru CLK_RKVDEC_CORE>,
>>
>> ---
>> base-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f
>> change-id: 20260223-vdec-reg-order-rk3576-cc2ec6e05e98
>>