Re: [PATCH v2 2/3] PCI: dwc: Add helper to Program T_POWER_ON

[Krishna Chaitanya Chundru]

On 2/23/2026 9:08 PM, Bjorn Helgaas wrote:
>    PCI: dwc: Add dw_pcie_program_t_power_on() helper for L1SS T_POWER_ON
>
> On Mon, Feb 23, 2026 at 04:43:31PM +0530, Krishna Chaitanya Chundru wrote:
> > The T_POWER_ON indicates the time (in μs) that a Port requires the port
> > on the opposite side of Link to wait in L1.2.Exit after sampling CLKREQ#
> > asserted before actively driving the interface. This value is used by
> > the ASPM driver to compute the LTR_L1.2_THRESHOLD.
> >
> > Currently, some controllers exposes T_POWER_ON value of zero in the L1SS
> > capability registers, leading to incorrect LTR_L1.2_THRESHOLD calculations,
> > which  can result in improper L1.2 exit behavior and can trigger AER's.
> s/some controllers exposes/some controllers expose/
>
> > Add a helper to override T_POWER_ON value by the DWC controller drivers.
> s/a helper/dw_pcie_program_t_power_on()/
>
> > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@xxxxxxxxxxxxxxxx>
> > ---
> >   drivers/pci/controller/dwc/pcie-designware.c | 27 +++++++++++++++++++++++++++
> >   drivers/pci/controller/dwc/pcie-designware.h |  1 +
> >   2 files changed, 28 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> > index 5741c09dde7f40487c6da6dfd66f7c8d96a74259..f56e2c07ddc57bd84882c14bebc7d4b4961f601a 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware.c
> > @@ -1249,6 +1249,33 @@ void dw_pcie_hide_unsupported_l1ss(struct dw_pcie *pci)
> >   	dw_pcie_writel_dbi(pci, l1ss + PCI_L1SS_CAP, l1ss_cap);
> >   }
> >   
> > +/* TODO: Need to handle multi root ports */
> > +void dw_pcie_program_t_power_on(struct dw_pcie *pci, u16 t_power_on)
> > +{
> > +	u8 scale, value;
> > +	u16 offset;
> > +	u32 val;
> > +
> > +	if (!t_power_on)
> > +		return;
> > +
> > +	offset = dw_pcie_find_ext_capability(pci, PCI_EXT_CAP_ID_L1SS);
> > +	if (offset) {
>    if (!offset)
>      return;
>
> > +		pcie_encode_t_power_on(t_power_on, &scale, &value);
> > +
> > +		dw_pcie_dbi_ro_wr_en(pci);
> > +
> > +		val = readl(pci->dbi_base + offset + PCI_L1SS_CAP);
> > +		val &= ~(PCI_L1SS_CAP_P_PWR_ON_SCALE | PCI_L1SS_CAP_P_PWR_ON_VALUE);
> > +		val |= FIELD_PREP(PCI_L1SS_CAP_P_PWR_ON_SCALE, scale);
> > +		val |= FIELD_PREP(PCI_L1SS_CAP_P_PWR_ON_VALUE, value);
>    FIELD_MODIFY(PCI_L1SS_CAP_P_PWR_ON_SCALE, &reg, scale);
>    FIELD_MODIFY(PCI_L1SS_CAP_P_PWR_ON_VALUE, &reg, value);
ack, I will fix all the comments in next series.

- Krishna Chaitanya.
> > +		writel(val, pci->dbi_base + offset + PCI_L1SS_CAP);
> > +
> > +		dw_pcie_dbi_ro_wr_dis(pci);
> > +	}
> > +}
> > +
> >   void dw_pcie_setup(struct dw_pcie *pci)
> >   {
> >   	u32 val;
> > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> > index ae6389dd9caa5c27690f998d58729130ea863984..da67beece3f11e33d9a1937fa23d443feea3bbc7 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware.h
> > +++ b/drivers/pci/controller/dwc/pcie-designware.h
> > @@ -602,6 +602,7 @@ int dw_pcie_prog_ep_inbound_atu(struct dw_pcie *pci, u8 func_no, int index,
> >   				u8 bar, size_t size);
> >   void dw_pcie_disable_atu(struct dw_pcie *pci, u32 dir, int index);
> >   void dw_pcie_hide_unsupported_l1ss(struct dw_pcie *pci);
> > +void dw_pcie_program_t_power_on(struct dw_pcie *pci, u16 t_power_on);
> >   void dw_pcie_setup(struct dw_pcie *pci);
> >   void dw_pcie_iatu_detect(struct dw_pcie *pci);
> >   int dw_pcie_edma_detect(struct dw_pcie *pci);
> >
> > --
> > 2.34.1