[PATCH v2 3/3] clk: x86: lpss-atom: Read frequency from the property

[Andy Shevchenko]

On the future platforms we might need to have different frequency
of the free running clock. Allow that to be modified via supplied
device property.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
---
 drivers/clk/x86/clk-lpss-atom.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/x86/clk-lpss-atom.c b/drivers/clk/x86/clk-lpss-atom.c
index 57b0823d6ff2..597d20e492d2 100644
--- a/drivers/clk/x86/clk-lpss-atom.c
+++ b/drivers/clk/x86/clk-lpss-atom.c
@@ -10,23 +10,36 @@
 #include <linux/clk-provider.h>
 #include <linux/err.h>
 #include <linux/module.h>
-#include <linux/platform_data/x86/clk-lpss.h>
 #include <linux/platform_device.h>
+#include <linux/property.h>
 #include <linux/units.h>
 
+#include <linux/platform_data/x86/clk-lpss.h>
+
 static int lpss_atom_clk_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct lpss_clk_data *drvdata;
 	struct clk *clk;
+	u32 rate;
+	int ret;
 
 	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
 	if (!drvdata)
 		return -ENOMEM;
 
+	if (device_property_present(dev, "clock-frequency")) {
+		ret = device_property_read_u32(dev, "clock-frequency", &rate);
+		if (ret)
+			return ret;
+	} else {
+		/* Default frequency is 100MHz */
+		rate = 100 * HZ_PER_MHZ;
+	}
+
 	/* LPSS free running clock */
 	drvdata->name = "lpss_clk";
-	clk = clk_register_fixed_rate(dev, drvdata->name, NULL, 0, 100 * HZ_PER_MHZ);
+	clk = clk_register_fixed_rate(dev, drvdata->name, NULL, 0, rate);
 	if (IS_ERR(clk))
 		return PTR_ERR(clk);
 
-- 
2.50.1